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Message-ID: <3dadade8-6e77-e27f-d5a6-307de17a4dd0@denx.de>
Date: Sun, 25 Oct 2020 13:18:48 +0100
From: Marek Vasut <marex@...x.de>
To: Abel Vesa <abel.vesa@....com>, Adam Ford <aford173@...il.com>
Cc: linux-clk <linux-clk@...r.kernel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Rob Herring <robh+dt@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
arm-soc <linux-arm-kernel@...ts.infradead.org>,
devicetree <devicetree@...r.kernel.org>
Subject: Re: [RFC 0/3] clk: imx: Implement blk-ctl driver for i.MX8MN
On 10/25/20 1:05 PM, Abel Vesa wrote:
[...]
>> Together, both the GPC and the clk-blk driver should be able to pull
>> the multimedia block out of reset. Currently, the GPC can handle the
>> USB OTG and the GPU, but the LCDIF and MIPI DSI appear to be gated by
>> the clock block
>>
>> My original patch RFC didn't include the imx8mn node, because it
>> hangs, but the node I added looks like:
>>
>> media_blk_ctl: clock-controller@...28000 {
>> compatible = "fsl,imx8mn-media-blk-ctl", "syscon";
>> reg = <0x32e28000 0x1000>;
>> #clock-cells = <1>;
>> #reset-cells = <1>;
>> };
>>
>> I was hoping you might have some feedback on the 8mn clk-blk driver
>> since you did the 8mp clk-blk drive and they appear to be very
>> similar.
>>
>
> I'll do you one better still. I'll apply the patch in my tree and give it
> a test tomorrow morning.
You can also apply the one for 8MM:
https://lore.kernel.org/linux-arm-kernel/20201003224555.163780-5-marex@denx.de/
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