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Message-Id: <1603740750-10385-5-git-send-email-abel.vesa@nxp.com>
Date: Mon, 26 Oct 2020 21:32:20 +0200
From: Abel Vesa <abel.vesa@....com>
To: Mike Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Adam Ford <aford173@...il.com>,
Marek Vasut <marek.vasut@...il.com>,
Lucas Stach <l.stach@...gutronix.de>,
Rob Herring <robh@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <kernel@...gutronix.de>,
Fabio Estevam <fabio.estevam@....com>,
Anson Huang <anson.huang@....com>,
Jacky Bai <ping.bai@....com>, Peng Fan <peng.fan@....com>,
Dong Aisheng <aisheng.dong@....com>
Cc: NXP Linux Team <linux-imx@....com>,
linux-arm-kernel@...ts.infradead.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
Abel Vesa <abel.vesa@....com>
Subject: [PATCH v4 04/14] dt-bindings: clock: imx8mp: Add media blk_ctl clock IDs
These will be used by the imx8mp for blk_ctl driver.
Signed-off-by: Abel Vesa <abel.vesa@....com>
Acked-by: Rob Herring <robh@...nel.org>
Reviewed-by: Dong Aisheng <aisheng.dong@....com>
---
include/dt-bindings/clock/imx8mp-clock.h | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h
index 5fc2c40..12632fa 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -396,4 +396,32 @@
#define IMX8MP_CLK_AUDIO_BLK_CTL_END 59
+#define IMX8MP_CLK_MEDIA_BLK_CTL_MIPI_DSI_PCLK 0
+#define IMX8MP_CLK_MEDIA_BLK_CTL_MIPI_DSI_CLKREF 1
+#define IMX8MP_CLK_MEDIA_BLK_CTL_MIPI_CSI_PCLK 2
+#define IMX8MP_CLK_MEDIA_BLK_CTL_MIPI_CSI_ACLK 3
+#define IMX8MP_CLK_MEDIA_BLK_CTL_LCDIF_PIXEL 4
+#define IMX8MP_CLK_MEDIA_BLK_CTL_LCDIF_APB 5
+#define IMX8MP_CLK_MEDIA_BLK_CTL_ISI_PROC 6
+#define IMX8MP_CLK_MEDIA_BLK_CTL_ISI_APB 7
+#define IMX8MP_CLK_MEDIA_BLK_CTL_BUS_BLK 8
+#define IMX8MP_CLK_MEDIA_BLK_CTL_MIPI_CSI2_PCLK 9
+#define IMX8MP_CLK_MEDIA_BLK_CTL_MIPI_CSI2_ACLK 10
+#define IMX8MP_CLK_MEDIA_BLK_CTL_LCDIF2_PIXEL 11
+#define IMX8MP_CLK_MEDIA_BLK_CTL_LCDIF2_APB 12
+#define IMX8MP_CLK_MEDIA_BLK_CTL_ISP1_COR 13
+#define IMX8MP_CLK_MEDIA_BLK_CTL_ISP1_AXI 14
+#define IMX8MP_CLK_MEDIA_BLK_CTL_ISP1_AHB 15
+#define IMX8MP_CLK_MEDIA_BLK_CTL_ISP0_COR 16
+#define IMX8MP_CLK_MEDIA_BLK_CTL_ISP0_AXI 17
+#define IMX8MP_CLK_MEDIA_BLK_CTL_ISP0_AHB 18
+#define IMX8MP_CLK_MEDIA_BLK_CTL_DWE_COR 19
+#define IMX8MP_CLK_MEDIA_BLK_CTL_DWE_AXI 20
+#define IMX8MP_CLK_MEDIA_BLK_CTL_DWE_AHB 21
+#define IMX8MP_CLK_MEDIA_BLK_CTL_MIPI_DSI2 22
+#define IMX8MP_CLK_MEDIA_BLK_CTL_LCDIF_AXI 23
+#define IMX8MP_CLK_MEDIA_BLK_CTL_LCDIF2_AXI 24
+
+#define IMX8MP_CLK_MEDIA_BLK_CTL_END 25
+
#endif
--
2.7.4
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