linux-kernel - Re: [PATCH 1/5] memory: tegra: Correct la.reg address of seswr

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Date:   Mon, 26 Oct 2020 21:14:46 +0100
From:   Krzysztof Kozlowski <krzk@...nel.org>
To:     Nicolin Chen <nicoleotsuka@...il.com>
Cc:     thierry.reding@...il.com, robh+dt@...nel.org, jonathanh@...dia.com,
        linux-tegra@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/5] memory: tegra: Correct la.reg address of seswr

On Wed, Oct 07, 2020 at 05:37:42PM -0700, Nicolin Chen wrote:
> According to Tegra X1 TRM, ALLOWANCE_SESWR is located in field
> [23:16] of register at address 0x3e0 with a reset value of 0x80
> at register 0x3e0, while bit-1 of register 0xb98 is for enable
> bit of seswr.

> So this patch fixes it.

Either use the imperative form ("Fix foo bar register address") or just
skip the last sentence as it is quite obvious.

https://elixir.bootlin.com/linux/latest/source/Documentation/process/submitting-patches.rst#L151

Thanks, applied.

Best regards,
Krzysztof