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Date: Mon, 26 Oct 2020 18:10:04 +0200
From: Ioana Ciornei <ioana.ciornei@....com>
To: shawnguo@...nel.org
Cc: robh+dt@...nel.org, leoyang.li@....com, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Ioana Ciornei <ioana.ciornei@....com>
Subject: [PATCH v4 10/11] arm64: dts: lx2160a: add PCS MDIO and PCS PHY nodes
Add PCS MDIO nodes for the internal MDIO buses on the LX2160A, along
with their internal PCS PHYs, which will be used when the DPMAC is
in TYPE_PHY mode.
Also, rename the dpmac@x nodes to ethernet@x in order to be compliant
with the naming convention used by ethernet controllers.
Signed-off-by: Ioana Ciornei <ioana.ciornei@....com>
---
Changes in v2:
- none
Changes in v3:
- renamed dpmac@x into ethernet@x
Changes in v4:
- none
.../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 288 ++++++++++++++++--
1 file changed, 270 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 83072da6f6c6..f4e69c5f9c68 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -1305,6 +1305,240 @@ emdio2: mdio@...7000 {
status = "disabled";
};
+ pcs_mdio1: mdio@...7000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c07000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs1: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio2: mdio@...b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0b000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs2: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio3: mdio@...f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0f000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs3: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio4: mdio@...3000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c13000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs4: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio5: mdio@...7000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c17000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs5: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio6: mdio@...b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c1b000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs6: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio7: mdio@...f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c1f000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs7: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio8: mdio@...3000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c23000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs8: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio9: mdio@...7000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c27000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs9: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio10: mdio@...b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c2b000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs10: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio11: mdio@...f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c2f000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs11: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio12: mdio@...3000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c33000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs12: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio13: mdio@...7000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c37000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs13: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio14: mdio@...b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c3b000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs14: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio15: mdio@...f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c3f000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs15: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio16: mdio@...3000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c43000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs16: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio17: mdio@...7000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c47000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs17: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ pcs_mdio18: mdio@...b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c4b000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs18: pcs-phy@0 {
+ reg = <0>;
+ };
+ };
+
fsl_mc: fsl-mc@...000000 {
compatible = "fsl,qoriq-mc";
reg = <0x00000008 0x0c000000 0 0x40>,
@@ -1330,94 +1564,112 @@ dpmacs {
#address-cells = <1>;
#size-cells = <0>;
- dpmac1: dpmac@1 {
+ dpmac1: ethernet@1 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x1>;
+ pcs-handle = <&pcs1>;
};
- dpmac2: dpmac@2 {
+ dpmac2: ethernet@2 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x2>;
+ pcs-handle = <&pcs2>;
};
- dpmac3: dpmac@3 {
+ dpmac3: ethernet@3 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x3>;
+ pcs-handle = <&pcs3>;
};
- dpmac4: dpmac@4 {
+ dpmac4: ethernet@4 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x4>;
+ pcs-handle = <&pcs4>;
};
- dpmac5: dpmac@5 {
+ dpmac5: ethernet@5 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x5>;
+ pcs-handle = <&pcs5>;
};
- dpmac6: dpmac@6 {
+ dpmac6: ethernet@6 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x6>;
+ pcs-handle = <&pcs6>;
};
- dpmac7: dpmac@7 {
+ dpmac7: ethernet@7 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x7>;
+ pcs-handle = <&pcs7>;
};
- dpmac8: dpmac@8 {
+ dpmac8: ethernet@8 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x8>;
+ pcs-handle = <&pcs8>;
};
- dpmac9: dpmac@9 {
+ dpmac9: ethernet@9 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x9>;
+ pcs-handle = <&pcs9>;
};
- dpmac10: dpmac@a {
+ dpmac10: ethernet@a {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xa>;
+ pcs-handle = <&pcs10>;
};
- dpmac11: dpmac@b {
+ dpmac11: ethernet@b {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xb>;
+ pcs-handle = <&pcs11>;
};
- dpmac12: dpmac@c {
+ dpmac12: ethernet@c {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xc>;
+ pcs-handle = <&pcs12>;
};
- dpmac13: dpmac@d {
+ dpmac13: ethernet@d {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xd>;
+ pcs-handle = <&pcs13>;
};
- dpmac14: dpmac@e {
+ dpmac14: ethernet@e {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xe>;
+ pcs-handle = <&pcs14>;
};
- dpmac15: dpmac@f {
+ dpmac15: ethernet@f {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xf>;
+ pcs-handle = <&pcs15>;
};
- dpmac16: dpmac@10 {
+ dpmac16: ethernet@10 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x10>;
+ pcs-handle = <&pcs16>;
};
- dpmac17: dpmac@11 {
+ dpmac17: ethernet@11 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x11>;
+ pcs-handle = <&pcs17>;
};
- dpmac18: dpmac@12 {
+ dpmac18: ethernet@12 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x12>;
+ pcs-handle = <&pcs18>;
};
};
};
--
2.28.0
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