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Message-ID: <20201026165536.glmo727mzixtrtq5@gilmour.lan>
Date:   Mon, 26 Oct 2020 17:55:36 +0100
From:   Maxime Ripard <maxime@...no.tech>
To:     Paul Kocialkowski <paul.kocialkowski@...tlin.com>
Cc:     linux-media@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        devel@...verdev.osuosl.org, linux-sunxi@...glegroups.com,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Rob Herring <robh+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
        Yong Deng <yong.deng@...ewell.com>,
        Kishon Vijay Abraham I <kishon@...com>,
        Vinod Koul <vkoul@...nel.org>,
        Helen Koike <helen.koike@...labora.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Hans Verkuil <hans.verkuil@...co.com>,
        Sakari Ailus <sakari.ailus@...ux.intel.com>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Hans Verkuil <hverkuil@...all.nl>, kevin.lhopital@...mail.com
Subject: Re: [PATCH 10/14] ARM: dts: sun8i: v3s: Add MIPI D-PHY and MIPI
 CSI-2 interface nodes

On Fri, Oct 23, 2020 at 07:45:42PM +0200, Paul Kocialkowski wrote:
> MIPI CSI-2 is supported on the V3s with an A31 controller, which seems
> to be used on all Allwinner chips supporting it, except for the A83T.
> The controller is connected to CSI0 through fwnode endpoints.
> The mipi_csi2_in port node is provided to connect MIPI CSI-2 sensors.
> 
> The D-PHY part is the same that already drives DSI, but used in Rx mode.
> 
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@...tlin.com>

Especially since you haven't tested CSI0 without MIPI-CSI, you can
squash that patch into the previous one.

Maxime

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