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Message-ID: <202010271956.lOGjlakw-lkp@intel.com>
Date: Tue, 27 Oct 2020 19:19:07 +0800
From: kernel test robot <lkp@...el.com>
To: Paul Cercueil <paul@...pouillou.net>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Bin Liu <b-liu@...com>
Subject: drivers/usb/musb/musbhsdma.c:324:8: warning: variable 'devctl' set
but not used
Hi Paul,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 4525c8781ec0701ce824e8bd379ae1b129e26568
commit: 57aadb46bd634c7889403220dcd110c7ff2c4868 usb: musb: jz4740: Add support for DMA
date: 7 months ago
config: mips-randconfig-r022-20201027 (attached as .config)
compiler: mips-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=57aadb46bd634c7889403220dcd110c7ff2c4868
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 57aadb46bd634c7889403220dcd110c7ff2c4868
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All warnings (new ones prefixed by >>):
drivers/usb/musb/musbhsdma.c: In function 'dma_controller_irq':
>> drivers/usb/musb/musbhsdma.c:324:8: warning: variable 'devctl' set but not used [-Wunused-but-set-variable]
324 | u8 devctl;
| ^~~~~~
vim +/devctl +324 drivers/usb/musb/musbhsdma.c
550a7375fe72092 Felipe Balbi 2008-07-24 265
edce61776c7e212 Min Guo 2020-01-15 266 irqreturn_t dma_controller_irq(int irq, void *private_data)
550a7375fe72092 Felipe Balbi 2008-07-24 267 {
458e6a511f9dc91 Felipe Balbi 2008-09-11 268 struct musb_dma_controller *controller = private_data;
458e6a511f9dc91 Felipe Balbi 2008-09-11 269 struct musb *musb = controller->private_data;
458e6a511f9dc91 Felipe Balbi 2008-09-11 270 struct musb_dma_channel *musb_channel;
458e6a511f9dc91 Felipe Balbi 2008-09-11 271 struct dma_channel *channel;
458e6a511f9dc91 Felipe Balbi 2008-09-11 272
458e6a511f9dc91 Felipe Balbi 2008-09-11 273 void __iomem *mbase = controller->base;
458e6a511f9dc91 Felipe Balbi 2008-09-11 274
550a7375fe72092 Felipe Balbi 2008-07-24 275 irqreturn_t retval = IRQ_NONE;
458e6a511f9dc91 Felipe Balbi 2008-09-11 276
550a7375fe72092 Felipe Balbi 2008-07-24 277 unsigned long flags;
550a7375fe72092 Felipe Balbi 2008-07-24 278
458e6a511f9dc91 Felipe Balbi 2008-09-11 279 u8 bchannel;
458e6a511f9dc91 Felipe Balbi 2008-09-11 280 u8 int_hsdma;
458e6a511f9dc91 Felipe Balbi 2008-09-11 281
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 282 u32 addr, count;
458e6a511f9dc91 Felipe Balbi 2008-09-11 283 u16 csr;
458e6a511f9dc91 Felipe Balbi 2008-09-11 284
550a7375fe72092 Felipe Balbi 2008-07-24 285 spin_lock_irqsave(&musb->lock, flags);
550a7375fe72092 Felipe Balbi 2008-07-24 286
9c93d7fd464e7aa Min Guo 2020-01-15 287 int_hsdma = musb_clearb(mbase, MUSB_HSDMA_INTR);
550a7375fe72092 Felipe Balbi 2008-07-24 288
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 289 if (!int_hsdma) {
b99d3659b309b35 Bin Liu 2016-06-30 290 musb_dbg(musb, "spurious DMA irq");
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 291
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 292 for (bchannel = 0; bchannel < MUSB_HSDMA_CHANNELS; bchannel++) {
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 293 musb_channel = (struct musb_dma_channel *)
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 294 &(controller->channel[bchannel]);
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 295 channel = &musb_channel->channel;
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 296 if (channel->status == MUSB_DMA_STATUS_BUSY) {
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 297 count = musb_read_hsdma_count(mbase, bchannel);
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 298
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 299 if (count == 0)
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 300 int_hsdma |= (1 << bchannel);
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 301 }
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 302 }
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 303
b99d3659b309b35 Bin Liu 2016-06-30 304 musb_dbg(musb, "int_hsdma = 0x%x", int_hsdma);
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 305
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 306 if (!int_hsdma)
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 307 goto done;
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 308 }
f933a0c0fe0ea5f Anand Gadiyar 2009-12-28 309
458e6a511f9dc91 Felipe Balbi 2008-09-11 310 for (bchannel = 0; bchannel < MUSB_HSDMA_CHANNELS; bchannel++) {
458e6a511f9dc91 Felipe Balbi 2008-09-11 311 if (int_hsdma & (1 << bchannel)) {
458e6a511f9dc91 Felipe Balbi 2008-09-11 312 musb_channel = (struct musb_dma_channel *)
458e6a511f9dc91 Felipe Balbi 2008-09-11 313 &(controller->channel[bchannel]);
458e6a511f9dc91 Felipe Balbi 2008-09-11 314 channel = &musb_channel->channel;
550a7375fe72092 Felipe Balbi 2008-07-24 315
550a7375fe72092 Felipe Balbi 2008-07-24 316 csr = musb_readw(mbase,
458e6a511f9dc91 Felipe Balbi 2008-09-11 317 MUSB_HSDMA_CHANNEL_OFFSET(bchannel,
550a7375fe72092 Felipe Balbi 2008-07-24 318 MUSB_HSDMA_CONTROL));
550a7375fe72092 Felipe Balbi 2008-07-24 319
458e6a511f9dc91 Felipe Balbi 2008-09-11 320 if (csr & (1 << MUSB_HSDMA_BUSERROR_SHIFT)) {
458e6a511f9dc91 Felipe Balbi 2008-09-11 321 musb_channel->channel.status =
550a7375fe72092 Felipe Balbi 2008-07-24 322 MUSB_DMA_STATUS_BUS_ABORT;
458e6a511f9dc91 Felipe Balbi 2008-09-11 323 } else {
550a7375fe72092 Felipe Balbi 2008-07-24 @324 u8 devctl;
550a7375fe72092 Felipe Balbi 2008-07-24 325
6995eb68aab70e7 Bryan Wu 2008-12-02 326 addr = musb_read_hsdma_addr(mbase,
6995eb68aab70e7 Bryan Wu 2008-12-02 327 bchannel);
458e6a511f9dc91 Felipe Balbi 2008-09-11 328 channel->actual_len = addr
458e6a511f9dc91 Felipe Balbi 2008-09-11 329 - musb_channel->start_addr;
550a7375fe72092 Felipe Balbi 2008-07-24 330
b99d3659b309b35 Bin Liu 2016-06-30 331 musb_dbg(musb, "ch %p, 0x%x -> 0x%x (%zu / %d) %s",
458e6a511f9dc91 Felipe Balbi 2008-09-11 332 channel, musb_channel->start_addr,
458e6a511f9dc91 Felipe Balbi 2008-09-11 333 addr, channel->actual_len,
458e6a511f9dc91 Felipe Balbi 2008-09-11 334 musb_channel->len,
458e6a511f9dc91 Felipe Balbi 2008-09-11 335 (channel->actual_len
458e6a511f9dc91 Felipe Balbi 2008-09-11 336 < musb_channel->len) ?
550a7375fe72092 Felipe Balbi 2008-07-24 337 "=> reconfig 0" : "=> complete");
550a7375fe72092 Felipe Balbi 2008-07-24 338
550a7375fe72092 Felipe Balbi 2008-07-24 339 devctl = musb_readb(mbase, MUSB_DEVCTL);
550a7375fe72092 Felipe Balbi 2008-07-24 340
458e6a511f9dc91 Felipe Balbi 2008-09-11 341 channel->status = MUSB_DMA_STATUS_FREE;
550a7375fe72092 Felipe Balbi 2008-07-24 342
550a7375fe72092 Felipe Balbi 2008-07-24 343 /* completed */
c418fd6c01fbc55 Paul Elder 2019-01-30 344 if (musb_channel->transmit &&
c418fd6c01fbc55 Paul Elder 2019-01-30 345 (!channel->desired_mode ||
c418fd6c01fbc55 Paul Elder 2019-01-30 346 (channel->actual_len %
c418fd6c01fbc55 Paul Elder 2019-01-30 347 musb_channel->max_packet_sz))) {
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 348 u8 epnum = musb_channel->epnum;
d026e9c76aac363 Tony Lindgren 2014-11-24 349 int offset = musb->io.ep_offset(epnum,
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 350 MUSB_TXCSR);
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 351 u16 txcsr;
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 352
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 353 /*
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 354 * The programming guide says that we
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 355 * must clear DMAENAB before DMAMODE.
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 356 */
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 357 musb_ep_select(mbase, epnum);
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 358 txcsr = musb_readw(mbase, offset);
c418fd6c01fbc55 Paul Elder 2019-01-30 359 if (channel->desired_mode == 1) {
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 360 txcsr &= ~(MUSB_TXCSR_DMAENAB
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 361 | MUSB_TXCSR_AUTOSET);
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 362 musb_writew(mbase, offset, txcsr);
550a7375fe72092 Felipe Balbi 2008-07-24 363 /* Send out the packet */
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 364 txcsr &= ~MUSB_TXCSR_DMAMODE;
c418fd6c01fbc55 Paul Elder 2019-01-30 365 txcsr |= MUSB_TXCSR_DMAENAB;
c418fd6c01fbc55 Paul Elder 2019-01-30 366 }
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 367 txcsr |= MUSB_TXCSR_TXPKTRDY;
b6e434a5404b9ce Sergei Shtylyov 2009-03-26 368 musb_writew(mbase, offset, txcsr);
458e6a511f9dc91 Felipe Balbi 2008-09-11 369 }
c7bbc056a92476b Sergei Shtylyov 2009-03-26 370 musb_dma_completion(musb, musb_channel->epnum,
c7bbc056a92476b Sergei Shtylyov 2009-03-26 371 musb_channel->transmit);
550a7375fe72092 Felipe Balbi 2008-07-24 372 }
550a7375fe72092 Felipe Balbi 2008-07-24 373 }
550a7375fe72092 Felipe Balbi 2008-07-24 374 }
6995eb68aab70e7 Bryan Wu 2008-12-02 375
550a7375fe72092 Felipe Balbi 2008-07-24 376 retval = IRQ_HANDLED;
550a7375fe72092 Felipe Balbi 2008-07-24 377 done:
550a7375fe72092 Felipe Balbi 2008-07-24 378 spin_unlock_irqrestore(&musb->lock, flags);
550a7375fe72092 Felipe Balbi 2008-07-24 379 return retval;
550a7375fe72092 Felipe Balbi 2008-07-24 380 }
edce61776c7e212 Min Guo 2020-01-15 381 EXPORT_SYMBOL_GPL(dma_controller_irq);
550a7375fe72092 Felipe Balbi 2008-07-24 382
:::::: The code at line 324 was first introduced by commit
:::::: 550a7375fe720924241f0eb76e4a5c1a3eb8c32f USB: Add MUSB and TUSB support
:::::: TO: Felipe Balbi <felipe.balbi@...ia.com>
:::::: CC: Greg Kroah-Hartman <gregkh@...e.de>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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