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Message-ID: <DM6PR19MB3594E466A1B76229EC1395BABB160@DM6PR19MB3594.namprd19.prod.outlook.com>
Date: Tue, 27 Oct 2020 19:24:16 +0000
From: Thomas Langer <tlanger@...linear.com>
To: Amireddy Mallikarjuna reddy <mallikarjunax.reddy@...ux.intel.com>,
"dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
"vkoul@...nel.org" <vkoul@...nel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"Shevchenko, Andriy" <andriy.shevchenko@...el.com>,
"chuanhua.lei@...ux.intel.com" <chuanhua.lei@...ux.intel.com>,
"Kim, Cheol Yong" <Cheol.Yong.Kim@...el.com>,
"Wu, Qiming" <qi-ming.wu@...el.com>,
"malliamireddy009@...il.com" <malliamireddy009@...il.com>,
"peter.ujfalusi@...com" <peter.ujfalusi@...com>,
"Langer, Thomas" <thomas.langer@...el.com>
Subject: RE: [PATCH v7 1/2] dt-bindings: dma: Add bindings for intel LGM SOC
Hello Reddy,
I think "Intel" should always be written with a capital "I" (like in the Subject, but except in the binding below)
> + compatible:
> + oneOf:
> + - const: intel,lgm-cdma
> + - const: intel,lgm-dma2tx
> + - const: intel,lgm-dma1rx
> + - const: intel,lgm-dma1tx
> + - const: intel,lgm-dma0tx
> + - const: intel,lgm-dma3
> + - const: intel,lgm-toe-dma30
> + - const: intel,lgm-toe-dma31
Bindings are normally not per instance.
What if next generation chip gets more DMA modules but has no other changes in the HW block?
What is wrong with
- const: intel,lgm-cdma
- const: intel,lgm-hdma
and extra attributes to define the rx/tx restriction (or what do it mean?)?
From the driver code I saw that "toe" is also just of type "hdma" and no further differences in code are done.
Best regards,
Thomas
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