linux-kernel - Re: [PATCH v4 1/5] x86/boot/compressed/64: Introduce sev

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Message-ID: <56004d19-d0f4-b98f-11b6-dc50b5d8b462@amd.com>
Date:   Wed, 28 Oct 2020 12:14:00 -0500
From:   Tom Lendacky <thomas.lendacky@....com>
To:     Joerg Roedel <joro@...tes.org>, x86@...nel.org
Cc:     Joerg Roedel <jroedel@...e.de>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Andy Lutomirski <luto@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Kees Cook <keescook@...omium.org>,
        Arvind Sankar <nivedita@...m.mit.edu>,
        Martin Radev <martin.b.radev@...il.com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 1/5] x86/boot/compressed/64: Introduce sev_status

On 10/28/20 11:46 AM, Joerg Roedel wrote:
> From: Joerg Roedel <jroedel@...e.de>
> 
> Introduce sev_status and initialize it together with sme_me_mask to have
> an indicator which SEV features are enabled.
> 
> Signed-off-by: Joerg Roedel <jroedel@...e.de>

Reviewed-by: Tom Lendacky <thomas.lendacky@....com>

> ---
>  arch/x86/boot/compressed/mem_encrypt.S | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/boot/compressed/mem_encrypt.S b/arch/x86/boot/compressed/mem_encrypt.S
> index dd07e7b41b11..0bae1ca658d9 100644
> --- a/arch/x86/boot/compressed/mem_encrypt.S
> +++ b/arch/x86/boot/compressed/mem_encrypt.S
> @@ -81,6 +81,19 @@ SYM_FUNC_START(set_sev_encryption_mask)
>  
>  	bts	%rax, sme_me_mask(%rip)	/* Create the encryption mask */
>  
> +	/*
> +	 * Read MSR_AMD64_SEV again and store it to sev_status. Can't do this in
> +	 * get_sev_encryption_bit() because this function is 32 bit code and
> +	 * shared between 64 bit and 32 bit boot path.
> +	 */
> +	movl	$MSR_AMD64_SEV, %ecx	/* Read the SEV MSR */
> +	rdmsr
> +
> +	/* Store MSR value in sev_status */
> +	shlq	$32, %rdx
> +	orq	%rdx, %rax
> +	movq	%rax, sev_status(%rip)
> +
>  .Lno_sev_mask:
>  	movq	%rbp, %rsp		/* Restore original stack pointer */
>  
> @@ -96,5 +109,6 @@ SYM_FUNC_END(set_sev_encryption_mask)
>  
>  #ifdef CONFIG_AMD_MEM_ENCRYPT
>  	.balign	8
> -SYM_DATA(sme_me_mask, .quad 0)
> +SYM_DATA(sme_me_mask,		.quad 0)
> +SYM_DATA(sev_status,		.quad 0)
>  #endif
>