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Message-ID: <20201028192729.GA170285@kozik-lap>
Date:   Wed, 28 Oct 2020 20:27:29 +0100
From:   Krzysztof Kozlowski <krzk@...nel.org>
To:     Dmitry Osipenko <digetx@...il.com>
Cc:     Thierry Reding <thierry.reding@...il.com>,
        Jonathan Hunter <jonathanh@...dia.com>,
        Georgi Djakov <georgi.djakov@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Peter De Schrijver <pdeschrijver@...dia.com>,
        MyungJoo Ham <myungjoo.ham@...sung.com>,
        Kyungmin Park <kyungmin.park@...sung.com>,
        Chanwoo Choi <cw00.choi@...sung.com>,
        Mikko Perttunen <cyndis@...si.fi>,
        Viresh Kumar <vireshk@...nel.org>,
        Peter Geis <pgwipeout@...il.com>,
        Nicolas Chauvet <kwizart@...il.com>,
        linux-tegra@...r.kernel.org, linux-pm@...r.kernel.org,
        linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v6 13/52] dt-bindings: memory: tegra124: emc: Document
 new interconnect property

On Tue, Oct 27, 2020 at 11:16:29PM +0300, Dmitry Osipenko wrote:
> 27.10.2020 22:48, Krzysztof Kozlowski пишет:
> > On Tue, Oct 27, 2020 at 10:19:28PM +0300, Dmitry Osipenko wrote:
> >> 27.10.2020 13:25, Krzysztof Kozlowski пишет:
> >>> On Mon, Oct 26, 2020 at 01:16:56AM +0300, Dmitry Osipenko wrote:
> >>>> External memory controller is interconnected with memory controller and
> >>>> with external memory. Document new interconnect property which turns
> >>>> External Memory Controller into interconnect provider.
> >>>>
> >>>> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
> >>>> ---
> >>>>  .../bindings/memory-controllers/nvidia,tegra124-emc.yaml   | 7 +++++++
> >>>>  1 file changed, 7 insertions(+)
> >>>>
> >>>> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml
> >>>> index 278549f9e051..ac00832ceac1 100644
> >>>> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml
> >>>> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml
> >>>> @@ -29,6 +29,9 @@ properties:
> >>>>      items:
> >>>>        - const: emc
> >>>>  
> >>>> +  "#interconnect-cells":
> >>>> +    const: 0
> >>>> +
> >>>>    nvidia,memory-controller:
> >>>>      $ref: /schemas/types.yaml#/definitions/phandle
> >>>>      description:
> >>>> @@ -327,6 +330,7 @@ required:
> >>>>    - clocks
> >>>>    - clock-names
> >>>>    - nvidia,memory-controller
> >>>> +  - "#interconnect-cells"
> >>>
> >>> Another required property, what about all existing users of this binding?
> >>
> >> EMC/devfreq drivers check presence of the new properties and ask users
> >> to upgrade the DT. The kernel will continue to work fine using older
> >> DTBs, but devfreq driver won't load.
> > 
> > If the devfreq was working fine before (with these older DTBs and older
> > kernel) then you break the feature.
> > 
> > If devfreq was not working or was not stable enough, then nothing is
> > broken so such change is accepted.
> > 
> > Which one is then?
> 
> Definitely the latter. The current devfreq works okay'ish, but we rely
> on hardware to recover from temporal FIFO underflows and it's a
> user-visible problem which this series addresses.

I understand. Fine with me, thanks for explanation.

Best regards,
Krzysztof

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