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Message-ID: <20201028124920.pot77v4phkqiswhr@ti.com>
Date: Wed, 28 Oct 2020 18:19:22 +0530
From: Pratyush Yadav <p.yadav@...com>
To: <Tudor.Ambarus@...rochip.com>
CC: <miquel.raynal@...tlin.com>, <richard@....at>, <vigneshr@...com>,
<linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<nsekhar@...com>, <boris.brezillon@...labora.com>
Subject: Re: [PATCH v16 00/15] mtd: spi-nor: add xSPI Octal DTR support
Hi Tudor,
On 28/10/20 07:53AM, Tudor.Ambarus@...rochip.com wrote:
> Hi, Pratyush,
>
> On 10/5/20 6:31 PM, Pratyush Yadav wrote:
> > Tested on Micron MT35X and S28HS flashes for Octal DTR.
>
> Do these flashes define the "Command Sequences to Change to
> Octal DDR (8D-8D-8D) mode" table? Can't we use that table
> instead of defining our own octal dtr enable functions?
The Micron flash does not have this table. The Cypress flash does. The
problem is that one of the samples of the Cypress flash I tested on had
incorrect data in that table which meant the sequence would fail. The
newer samples of the flash have the correct data.
I don't know how many of those faulty flashes are out there in the wild.
IMO, to be on the safe side spi_nor_cypress_octal_dtr_enable() needs to
be implemented. So from the point of view of this series there is no
need to parse the Octal DDR enable table.
> I see that Mason used this table for a macronix flash:
> https://patchwork.ozlabs.org/project/linux-mtd/patch/1590737775-4798-4-git-send-email-masonccyang@mxic.com.tw/
> https://patchwork.ozlabs.org/project/linux-mtd/patch/1590737775-4798-8-git-send-email-masonccyang@mxic.com.tw/
>
> Cheers,
> ta
--
Regards,
Pratyush Yadav
Texas Instruments India
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