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Message-ID: <20201029173047.7zrato523q6bgq33@gilmour.lan>
Date: Thu, 29 Oct 2020 18:30:47 +0100
From: Maxime Ripard <maxime@...no.tech>
To: Yu-Tung Chang <mtwget@...il.com>
Cc: robh+dt@...nel.org, wens@...e.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/1] ARM: dts: sun8i: h3: Add initial NanoPi R1 support
Hi,
On Tue, Oct 27, 2020 at 04:48:03PM +0800, Yu-Tung Chang wrote:
> The NanoPi R1 is a complete open source board developed
> by FriendlyElec for makers, hobbyists, fans and etc.
>
> NanoPi R1 key features
> - Allwinner H3, Quad-core Cortex-A7@...GHz
> - 512MB/1GB DDR3 RAM
> - 8GB eMMC
> - microSD slot
> - 10/100/1000M Ethernet x 1
> - 10/100 Ethernet x 1
> - Wifi 802.11b/g/n
> - Bluetooth 4.0
> - Serial Debug Port
> - 5V 2A DC power-supply
>
> Signed-off-by: Yu-Tung Chang <mtwget@...il.com>
> ---
> .../devicetree/bindings/arm/sunxi.yaml | 5 +
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts | 199 ++++++++++++++++++
> 3 files changed, 205 insertions(+)
> create mode 100644 arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
>
> diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
> index 0f23133672a3..54a1aaee7e22 100644
> --- a/Documentation/devicetree/bindings/arm/sunxi.yaml
> +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
> @@ -251,6 +251,11 @@ properties:
> - const: friendlyarm,nanopi-neo-plus2
> - const: allwinner,sun50i-h5
>
> + - description: FriendlyARM NanoPi R1
> + items:
> + - const: friendlyarm,nanopi-r1
> + - const: allwinner,sun8i-h3
> +
> - description: FriendlyARM ZeroPi
> items:
> - const: friendlyarm,zeropi
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 4f0adfead547..aabaf67f86ed 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1192,6 +1192,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
> sun8i-h3-nanopi-m1-plus.dtb \
> sun8i-h3-nanopi-neo.dtb \
> sun8i-h3-nanopi-neo-air.dtb \
> + sun8i-h3-nanopi-r1.dtb \
> sun8i-h3-orangepi-2.dtb \
> sun8i-h3-orangepi-lite.dtb \
> sun8i-h3-orangepi-one.dtb \
> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> new file mode 100644
> index 000000000000..d4b90892a4d8
> --- /dev/null
> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> @@ -0,0 +1,199 @@
> +/*
> + * Copyright (C) 2019 Igor Pecovnik <igor@...bian.com>
> + * Copyright (C) 2020 Jayantajit Gogoi <jayanta.gogoi525@...il.com>
> + * Copyright (C) 2020 Yu-Tung Chang <mtwget@...il.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
You should use an SPDX header instead of the license text here
> +#include "sun8i-h3-nanopi.dtsi"
> +
> +/ {
> + model = "FriendlyARM NanoPi R1";
> + compatible = "friendlyarm,nanopi-r1", "allwinner,sun8i-h3";
> +
> + reg_gmac_3v3: gmac-3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "gmac-3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + startup-delay-us = <100000>;
> + enable-active-high;
> + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
> + };
> +
> + reg_vdd_cpux: gpio-regulator {
> + compatible = "regulator-gpio";
> + regulator-name = "vdd-cpux";
> + regulator-type = "voltage";
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-ramp-delay = <50>;
> + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
> + gpios-states = <0x1>;
> + states = <1100000 0x0
> + 1300000 0x1>;
> + };
> +
> + wifi_pwrseq: wifi_pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
> + clocks = <&rtc 1>;
> + clock-names = "ext_clock";
> + };
> +
> + leds {
> +
There's an extra line here
> + wan {
Those aren't valid node names, you should use led-[0-9] here
> + label = "nanopi:green:wan";
label is deprecated in favor of the "function" and "color" properties
> + gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
> + };
> +
> + lan {
> + label = "nanopi:green:lan";
> + gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>; /* PA9 */
> + };
> + };
> +};
> +
> +&cpu0 {
> + cpu-supply = <®_vdd_cpux>;
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +&ehci2 {
> + status = "okay";
> +};
> +
> +&emac {
> + pinctrl-names = "default";
> + pinctrl-0 = <&emac_rgmii_pins>;
> + phy-supply = <®_gmac_3v3>;
> + phy-handle = <&ext_rgmii_phy>;
> + phy-mode = "rgmii-id";
> + status = "okay";
> +};
> +
> +&external_mdio {
> + ext_rgmii_phy: ethernet-phy@7 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <7>;
> + };
> +};
> +
> +&mmc1 {
> + vmmc-supply = <®_vcc3v3>;
> + vqmmc-supply = <®_vcc3v3>;
> + mmc-pwrseq = <&wifi_pwrseq>;
> + bus-width = <4>;
> + non-removable;
> + status = "okay";
> +
> + sdio_wifi: sdio_wifi@1 {
> + reg = <1>;
> + compatible = "brcm,bcm4329-fmac";
> + interrupt-parent = <&pio>;
> + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
> + interrupt-names = "host-wake";
> + };
> +};
> +
> +&mmc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc2_8bit_pins>;
> + vmmc-supply = <®_vcc3v3>;
> + vqmmc-supply = <®_vcc3v3>;
> + bus-width = <8>;
> + non-removable;
> + status = "okay";
> +};
> +
> +&ohci1 {
> + status = "okay";
> +};
> +
> +&ohci2 {
> + status = "okay";
> +};
> +
> +®_usb0_vbus {
> + gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart1_pins>;
This should be the default already?
> + status = "okay";
> +};
> +
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart3_pins>, <&uart3_rts_cts_pins>;
> + uart-has-rtscts;
> + status = "okay";
> +
> + bluetooth {
> + compatible = "brcm,bcm43438-bt";
> + clocks = <&rtc 1>;
> + clock-names = "lpo";
> + vbat-supply = <®_vcc3v3>;
> + vddio-supply = <®_vcc3v3>;
> + device-wakeup-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
> + host-wakeup-gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
> + shutdown-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
> + };
> +};
> +
> +&usb_otg {
> + status = "okay";
> + dr_mode = "peripheral";
If there's an ID pin and a controllable VBUS, you should be able to use
otg here?
Thanks!
Maxime
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