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Message-ID: <3841e43b-5f16-4b5c-9b43-4d3a90e57723@cesnet.cz>
Date: Wed, 28 Oct 2020 17:20:24 +0100
From: Jan Kundrát <jan.kundrat@...net.cz>
To: Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>,
<linux-serial@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Mark Brown <broonie@...nel.org>,
Andy Shevchenko <andy.shevchenko@...il.com>,
<linux-spi@...r.kernel.org>
Subject: Re: [PATCH v2] serial: max310x: rework RX interrupt handling
On čtvrtek 1. října 2020 9:44:15 CEST, Thomas Petazzoni wrote:
> Currently, the RX interrupt logic uses the RXEMPTY interrupt, with the
> RXEMPTYINV bit set, which means we get an RX interrupt as soon as the
> RX FIFO is non-empty.
>
> However, with the MAX310X having a FIFO of 128 bytes, this makes very
> poor use of the FIFO: we trigger an interrupt as soon as the RX FIFO
> has one byte, which means a lot of interrupts, each only collecting a
> few bytes from the FIFO, causing a significant CPU load.
Thanks for taking the time to write this patch. We're using MAX14830 on a
Clearfog Base board via a 26 MHz SPI bus. Our code polls a custom
peripheral over UART at 115200 baud ten times a second; the messages are
typically shorter than 50 chars. Before this patch, `perf top --sort
comm,dso` showed about 28% CPU load for the corresponding SPI kthread,
after applying this patch it's between 3 and 5%. That's cool :).
Tested-by: Jan Kundrát <jan.kundrat@...net.cz>
Reviewed-by: Jan Kundrát <jan.kundrat@...net.cz>
(but see below, please)
> + /* Enable LSR, RX FIFO trigger, CTS change interrupts */
> + val = MAX310X_IRQ_LSR_BIT | MAX310X_IRQ_RXFIFO_BIT |
> MAX310X_IRQ_TXEMPTY_BIT;
> max310x_port_write(port, MAX310X_IRQEN_REG, val | MAX310X_IRQ_CTS_BIT);
This comment doesn't fully match that code, and also the effective value
that is written to the register is split into two statements. What about
just:
+ /* Enable LSR, RX FIFO trigger, TX FIFO empty, CTS change interrupts */
+ max310x_port_write(port, MAX310X_IRQEN_REG, MAX310X_IRQ_LSR_BIT |
MAX310X_IRQ_RXFIFO_BIT | MAX310X_IRQ_TXEMPTY_BIT | MAX310X_IRQ_CTS_BIT);
With kind regards,
Jan
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