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Message-ID: <20201029100038.GE4077@smile.fi.intel.com>
Date: Thu, 29 Oct 2020 12:00:38 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: linux-kernel@...r.kernel.org,
Linus Walleij <linus.walleij@...aro.org>
Subject: Re: [PATCH v1] pinctrl: intel: Add Intel Alder Lake pin controller
support
On Thu, Oct 29, 2020 at 10:08:27AM +0200, Mika Westerberg wrote:
> I think the $subject should say "Alder Lake-S" as this is for -S
> variant.
OK!
...
> > @@ -158,4 +166,5 @@ config PINCTRL_TIGERLAKE
> > help
> > This pinctrl driver provides an interface that allows configuring
> > of Intel Tiger Lake PCH pins and using them as GPIOs.
> > +
>
> Is this intentional ws change?
I guess it was intentional at some point, but not strictly related to this new
driver. I can split it out.
> > endif
>
> Otherwise looks good to me.
I'll send v2 soon.
--
With Best Regards,
Andy Shevchenko
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