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Message-ID: <20201031074437.168008-6-chenzhou10@huawei.com>
Date: Sat, 31 Oct 2020 15:44:34 +0800
From: Chen Zhou <chenzhou10@...wei.com>
To: <tglx@...utronix.de>, <mingo@...hat.com>, <dyoung@...hat.com>,
<bhe@...hat.com>, <catalin.marinas@....com>, <will@...nel.org>,
<corbet@....net>, <John.P.donnelly@...cle.com>,
<bhsharma@...hat.com>, <prabhakar.pkin@...il.com>
CC: <horms@...ge.net.au>, <robh+dt@...nel.org>, <arnd@...db.de>,
<nsaenzjulienne@...e.de>, <james.morse@....com>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<kexec@...ts.infradead.org>, <linux-doc@...r.kernel.org>,
<chenzhou10@...wei.com>, <xiexiuqi@...wei.com>,
<guohanjun@...wei.com>, <huawei.libin@...wei.com>,
<wangkefeng.wang@...wei.com>,
John Donnelly <John.p.donnelly@...cle.com>
Subject: [PATCH v13 5/8] arm64: kdump: introduce some macroes for crash kernel reservation
Introduce macro CRASH_ALIGN for alignment, macro CRASH_ADDR_LOW_MAX
for upper bound of low crash memory, macro CRASH_ADDR_HIGH_MAX for
upper bound of high crash memory, use macroes instead.
Besides, keep consistent with x86, use CRASH_ALIGN as the lower bound
of crash kernel reservation.
Signed-off-by: Chen Zhou <chenzhou10@...wei.com>
Tested-by: John Donnelly <John.p.donnelly@...cle.com>
---
arch/arm64/include/asm/kexec.h | 6 ++++++
arch/arm64/include/asm/processor.h | 1 +
arch/arm64/mm/init.c | 8 ++++----
3 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/include/asm/kexec.h b/arch/arm64/include/asm/kexec.h
index d24b527e8c00..402d208265a3 100644
--- a/arch/arm64/include/asm/kexec.h
+++ b/arch/arm64/include/asm/kexec.h
@@ -25,6 +25,12 @@
#define KEXEC_ARCH KEXEC_ARCH_AARCH64
+/* 2M alignment for crash kernel regions */
+#define CRASH_ALIGN SZ_2M
+
+#define CRASH_ADDR_LOW_MAX arm64_dma32_phys_limit
+#define CRASH_ADDR_HIGH_MAX MEMBLOCK_ALLOC_ACCESSIBLE
+
#ifndef __ASSEMBLY__
/**
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index fce8cbecd6bc..12131655cab7 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -96,6 +96,7 @@
#endif /* CONFIG_ARM64_FORCE_52BIT */
extern phys_addr_t arm64_dma_phys_limit;
+extern phys_addr_t arm64_dma32_phys_limit;
#define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
struct debug_info {
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 095540667f0f..a07fd8e1f926 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -60,7 +60,7 @@ EXPORT_SYMBOL(memstart_addr);
* bit addressable memory area.
*/
phys_addr_t arm64_dma_phys_limit __ro_after_init;
-static phys_addr_t arm64_dma32_phys_limit __ro_after_init;
+phys_addr_t arm64_dma32_phys_limit __ro_after_init;
#ifdef CONFIG_KEXEC_CORE
/*
@@ -85,8 +85,8 @@ static void __init reserve_crashkernel(void)
if (crash_base == 0) {
/* Current arm64 boot protocol requires 2MB alignment */
- crash_base = memblock_find_in_range(0, arm64_dma32_phys_limit,
- crash_size, SZ_2M);
+ crash_base = memblock_find_in_range(CRASH_ALIGN, CRASH_ADDR_LOW_MAX,
+ crash_size, CRASH_ALIGN);
if (crash_base == 0) {
pr_warn("cannot allocate crashkernel (size:0x%llx)\n",
crash_size);
@@ -104,7 +104,7 @@ static void __init reserve_crashkernel(void)
return;
}
- if (!IS_ALIGNED(crash_base, SZ_2M)) {
+ if (!IS_ALIGNED(crash_base, CRASH_ALIGN)) {
pr_warn("cannot reserve crashkernel: base address is not 2MB aligned\n");
return;
}
--
2.20.1
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