lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20201031114948.GA6198@kozik-lap>
Date:   Sat, 31 Oct 2020 12:49:48 +0100
From:   Krzysztof Kozlowski <krzk@...nel.org>
To:     Guillaume Tucker <guillaume.tucker@...labora.com>
Cc:     Russell King <linux@...linux.org.uk>,
        Kukjin Kim <kgene@...nel.org>,
        Rob Herring <robh+dt@...nel.org>, kernel@...labora.com,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 4/4] ARM: exynos: clear prefetch bits in default
 l2c_aux_val

On Mon, Aug 10, 2020 at 01:22:08PM +0100, Guillaume Tucker wrote:
> Clear the L310_AUX_CTRL_DATA_PREFETCH and L310_AUX_CTRL_INSTR_PREFETCH
> bits in the l2c_aux_val defaults for Exynos since they can now be set
> using the standard l2c2x0 devicetree bindings.
> 
> Signed-off-by: Guillaume Tucker <guillaume.tucker@...labora.com>
> ---
> 
> Notes:
>     v2: split patch to only clear exynos platform register bits
> 
>  arch/arm/mach-exynos/exynos.c | 4 ++--

Thanks, applied.

Best regards,
Krzysztof

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ