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Message-ID: <160425000919.397.3903804075850306877.tip-bot2@tip-bot2>
Date: Sun, 01 Nov 2020 17:00:09 -0000
From: "tip-bot2 for Greentime Hu" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Greentime Hu <greentime.hu@...ive.com>,
Marc Zyngier <maz@...nel.org>,
Anup Patel <anup@...infault.org>,
Atish Patra <atish.patra@....com>, x86 <x86@...nel.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: [tip: irq/urgent] irqchip/sifive-plic: Fix chip_data access within a
hierarchy
The following commit has been merged into the irq/urgent branch of tip:
Commit-ID: f9ac7bbd6e4540dcc6df621b9c9b6eb2e26ded1d
Gitweb: https://git.kernel.org/tip/f9ac7bbd6e4540dcc6df621b9c9b6eb2e26ded1d
Author: Greentime Hu <greentime.hu@...ive.com>
AuthorDate: Thu, 29 Oct 2020 10:37:38 +08:00
Committer: Marc Zyngier <maz@...nel.org>
CommitterDate: Sun, 01 Nov 2020 11:52:27
irqchip/sifive-plic: Fix chip_data access within a hierarchy
The plic driver crashes in plic_irq_unmask() when the interrupt is within a
hierarchy, as it picks the top-level chip_data instead of its local one.
Using irq_data_get_irq_chip_data() instead of irq_get_chip_data() solves
the issue for good.
Fixes: f1ad1133b18f ("irqchip/sifive-plic: Add support for multiple PLICs")
Signed-off-by: Greentime Hu <greentime.hu@...ive.com>
[maz: rewrote commit message]
Signed-off-by: Marc Zyngier <maz@...nel.org>
Reviewed-by: Anup Patel <anup@...infault.org>
Reviewed-by: Atish Patra <atish.patra@....com>
Link: https://lore.kernel.org/r/20201029023738.127472-1-greentime.hu@sifive.com
---
drivers/irqchip/irq-sifive-plic.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 4048657..6f432d2 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -99,7 +99,7 @@ static inline void plic_irq_toggle(const struct cpumask *mask,
struct irq_data *d, int enable)
{
int cpu;
- struct plic_priv *priv = irq_get_chip_data(d->irq);
+ struct plic_priv *priv = irq_data_get_irq_chip_data(d);
writel(enable, priv->regs + PRIORITY_BASE + d->hwirq * PRIORITY_PER_ID);
for_each_cpu(cpu, mask) {
@@ -115,7 +115,7 @@ static void plic_irq_unmask(struct irq_data *d)
{
struct cpumask amask;
unsigned int cpu;
- struct plic_priv *priv = irq_get_chip_data(d->irq);
+ struct plic_priv *priv = irq_data_get_irq_chip_data(d);
cpumask_and(&amask, &priv->lmask, cpu_online_mask);
cpu = cpumask_any_and(irq_data_get_affinity_mask(d),
@@ -127,7 +127,7 @@ static void plic_irq_unmask(struct irq_data *d)
static void plic_irq_mask(struct irq_data *d)
{
- struct plic_priv *priv = irq_get_chip_data(d->irq);
+ struct plic_priv *priv = irq_data_get_irq_chip_data(d);
plic_irq_toggle(&priv->lmask, d, 0);
}
@@ -138,7 +138,7 @@ static int plic_set_affinity(struct irq_data *d,
{
unsigned int cpu;
struct cpumask amask;
- struct plic_priv *priv = irq_get_chip_data(d->irq);
+ struct plic_priv *priv = irq_data_get_irq_chip_data(d);
cpumask_and(&amask, &priv->lmask, mask_val);
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