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Message-Id: <20201101192053.18644-4-michael@walle.cc>
Date: Sun, 1 Nov 2020 20:20:53 +0100
From: Michael Walle <michael@...le.cc>
To: linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>,
Michael Walle <michael@...le.cc>
Subject: [PATCH 4/4] arm64: dts: lx2160a: fix FlexSPI clock
Now that we have a proper driver for the FlexSPI interface use it. This
will fix SCK frequency switching on Layerscape SoCs.
This was only compile time tested.
Signed-off-by: Michael Walle <michael@...le.cc>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 83072da6f6c6..6e375e80bd35 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -659,9 +659,20 @@
};
dcfg: syscon@...0000 {
- compatible = "fsl,lx2160a-dcfg", "syscon";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,lx2160a-dcfg", "syscon", "simple-mfd";
reg = <0x0 0x1e00000 0x0 0x10000>;
+ ranges = <0x0 0x0 0x1e00000 0x10000>;
little-endian;
+
+ fspi_clk: clock-controller@900 {
+ compatible = "fsl,lx2160a-flexspi-clk";
+ reg = <0x900 0x4>;
+ #clock-cells = <0>;
+ clocks = <&clockgen 4 0>;
+ clock-output-names = "fspi_clk";
+ };
};
tmu: tmu@...0000 {
@@ -776,7 +787,7 @@
<0x0 0x20000000 0x0 0x10000000>;
reg-names = "fspi_base", "fspi_mmap";
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 3>, <&fspi_clk>;
clock-names = "fspi_en", "fspi";
status = "disabled";
};
--
2.20.1
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