linux-kernel - Re: [PATCH v6 9/9] arm64: dts: rockchip: add isp and sensors for Scarlet

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <14722083.QWuEjnDerj@phil>
Date:   Sun, 01 Nov 2020 11:55:16 +0100
From:   Heiko Stuebner <heiko@...ech.de>
To:     linux-media@...r.kernel.org,
        Helen Koike <helen.koike@...labora.com>
Cc:     devicetree@...r.kernel.org, linux-rockchip@...ts.infradead.org,
        linux-kernel@...r.kernel.org, devel@...verdev.osuosl.org,
        robh+dt@...nel.org, kernel@...labora.com, hverkuil-cisco@...all.nl,
        dafna.hirschfeld@...labora.com, mark.rutland@....com,
        karthik.poduval@...il.com, eddie.cai.linux@...il.com,
        jbx6244@...il.com, zhengsq@...k-chips.com, robin.murphy@....com
Subject: Re: [PATCH v6 9/9] arm64: dts: rockchip: add isp and sensors for Scarlet

Am Dienstag, 20. Oktober 2020, 21:38:50 CET schrieb Helen Koike:
> From: Eddie Cai <eddie.cai.linux@...il.com>
> 
> Enable ISP and camera sensor ov2685 and ov5695 for Scarlet Chromebook
> 
> Verified with:
>     make ARCH=arm64 dtbs_check
> 
> Signed-off-by: Shunqian Zheng <zhengsq@...k-chips.com>
> Signed-off-by: Eddie Cai <eddie.cai.linux@...il.com>
> Signed-off-by: Tomasz Figa <tfiga@...omium.org>
> Signed-off-by: Helen Koike <helen.koike@...labora.com>
> Reviewed-by: Tomasz Figa <tfiga@...omium.org>


looks good, and I'd like to apply this one after the drivers/media-patches
of this series got applied.


Thanks
Heiko

> ---
>  .../boot/dts/rockchip/rk3399-gru-scarlet.dtsi | 74 +++++++++++++++++++
>  1 file changed, 74 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
> index 60cd1c18cd4e0..beee5fbb34437 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
> @@ -296,6 +296,52 @@ camera: &i2c7 {
>  
>  	/* 24M mclk is shared between world and user cameras */
>  	pinctrl-0 = <&i2c7_xfer &test_clkout1>;
> +
> +	/* Rear-facing camera */
> +	wcam: camera@36 {
> +		compatible = "ovti,ov5695";
> +		reg = <0x36>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&wcam_rst>;
> +
> +		clocks = <&cru SCLK_TESTCLKOUT1>;
> +		clock-names = "xvclk";
> +
> +		avdd-supply = <&pp2800_cam>;
> +		dvdd-supply = <&pp1250_cam>;
> +		dovdd-supply = <&pp1800_s0>;
> +		reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
> +
> +		port {
> +			wcam_out: endpoint {
> +				remote-endpoint = <&mipi_in_wcam>;
> +				data-lanes = <1 2>;
> +			};
> +		};
> +	};
> +
> +	/* Front-facing camera */
> +	ucam: camera@3c {
> +		compatible = "ovti,ov2685";
> +		reg = <0x3c>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&ucam_rst>;
> +
> +		clocks = <&cru SCLK_TESTCLKOUT1>;
> +		clock-names = "xvclk";
> +
> +		avdd-supply = <&pp2800_cam>;
> +		dovdd-supply = <&pp1800_s0>;
> +		dvdd-supply = <&pp1800_s0>;
> +		reset-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
> +
> +		port {
> +			ucam_out: endpoint {
> +				remote-endpoint = <&mipi_in_ucam>;
> +				data-lanes = <1>;
> +			};
> +		};
> +	};
>  };
>  
>  &cdn_dp {
> @@ -353,10 +399,38 @@ &io_domains {
>  	gpio1830-supply = <&pp1800_s0>;		/* APIO4_VDD;  4c 4d */
>  };
>  
> +&isp0 {
> +	status = "okay";
> +
> +	ports {
> +		port@0 {
> +			mipi_in_wcam: endpoint@0 {
> +				reg = <0>;
> +				remote-endpoint = <&wcam_out>;
> +				data-lanes = <1 2>;
> +			};
> +
> +			mipi_in_ucam: endpoint@1 {
> +				reg = <1>;
> +				remote-endpoint = <&ucam_out>;
> +				data-lanes = <1>;
> +			};
> +		};
> +	};
> +};
> +
> +&isp0_mmu {
> +	status = "okay";
> +};
> +
>  &max98357a {
>  	sdmode-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
>  };
>  
> +&mipi_dphy_rx0 {
> +	status = "okay";
> +};
> +
>  &mipi_dsi {
>  	status = "okay";
>  	clock-master;
>