linux-kernel - [PATCH v1] PCI: brcmstb: variable is missing proper initialization

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Message-Id: <20201102205712.23332-1-james.quinlan@broadcom.com>
Date:   Mon,  2 Nov 2020 15:57:12 -0500
From:   Jim Quinlan <james.quinlan@...adcom.com>
To:     linux-pci@...r.kernel.org, bcm-kernel-feedback-list@...adcom.com,
        james.quinlan@...adcom.com,
        Rafał Miłecki <zajec5@...il.com>
Cc:     Nicolas Saenz Julienne <nsaenzjulienne@...e.de>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Rob Herring <robh@...nel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Andrew Murray <amurray@...goodpenguin.co.uk>,
        Jeremy Linton <jeremy.linton@....com>,
        linux-rpi-kernel@...ts.infradead.org (moderated list:BROADCOM
        BCM2711/BCM2835 ARM ARCHITECTURE),
        linux-arm-kernel@...ts.infradead.org (moderated list:BROADCOM
        BCM2711/BCM2835 ARM ARCHITECTURE),
        linux-kernel@...r.kernel.org (open list)
Subject: [PATCH v1] PCI: brcmstb: variable is missing proper initialization

The variable 'tmp' is used multiple times in the brcm_pcie_setup()
function.  One such usage did not initialize 'tmp' to the current value of
the target register.  By luck the mistake does not currently affect
behavior;  regardless 'tmp' is now initialized properly.

Fixes: c0452137034b ("PCI: brcmstb: Add Broadcom STB PCIe host controller driver")
Suggested-by: Rafał Miłecki <zajec5@...il.com>
Signed-off-by: Jim Quinlan <james.quinlan@...adcom.com>
---
 drivers/pci/controller/pcie-brcmstb.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index bea86899bd5d..9c3d2982248d 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -893,6 +893,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
 		burst = 0x2; /* 512 bytes */
 
 	/* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */
+	tmp = readl(base + PCIE_MISC_MISC_CTRL);
 	u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK);
 	u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK);
 	u32p_replace_bits(&tmp, burst, PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK);
-- 
2.17.1


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