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Message-ID: <20201102100952.a6ma334f4msnlvts@gilmour.lan>
Date:   Mon, 2 Nov 2020 11:09:52 +0100
From:   Maxime Ripard <maxime@...no.tech>
To:     Paul Kocialkowski <contact@...lk.fr>
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
        Chen-Yu Tsai <wens@...e.org>,
        Matteo Scordino <matteo.scordino@...il.com>,
        Icenowy Zheng <icenowy@...c.io>
Subject: Re: [PATCH 5/9] irqchip/sunxi-nmi: Add support for the V3s NMI

On Sat, Oct 31, 2020 at 07:21:33PM +0100, Paul Kocialkowski wrote:
> The V3s/V3 has a NMI IRQ controller, which is mainly used for the AXP209
> interrupt. In great wisdom, Allwinner decided to invert the enable and
> pending register offsets, compared to the A20.
> 
> As a result, a specific compatible and register description is required
> for the V3s. This was tested with an AXP209 on a V3 board.
> 
> Signed-off-by: Paul Kocialkowski <contact@...lk.fr>

Acked-by: Maxime Ripard <mripard@...nel.org>

Maxime

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