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Message-ID: <20201102101154.13598-1-kishon@ti.com>
Date: Mon, 2 Nov 2020 15:41:46 +0530
From: Kishon Vijay Abraham I <kishon@...com>
To: Lee Jones <lee.jones@...aro.org>, Rob Herring <robh+dt@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Tero Kristo <t-kristo@...com>, Nishanth Menon <nm@...com>
CC: Roger Quadros <rogerq@...com>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-pci@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>
Subject: [PATCH 0/8] J7200: Add PCIe DT nodes to Enable PCIe
Add DT binding documentation and device tree nodes to enable
PCIe in J7200.
Also included a fix in J721E that fixes the maximum number of
outbound regions. (This can go in 5.11 as it doesn't impact
any of the existing use-cases).
Kishon Vijay Abraham I (8):
dt-bindings: mfd: ti,j721e-system-controller.yaml: Document
"pcie-ctrl"
dt-bindings: PCI: Add host mode dt-bindings for TI's J7200 SoC
dt-bindings: PCI: Add EP mode dt-bindings for TI's J7200 SoC
arm64: dts: ti: k3-j7200-main: Add DT for WIZ and SERDES
arm64: dts: ti: k3-j7200-main: Add PCIe device tree node
arm64: dts: ti: k3-j7200-common-proc-board: Enable SERDES0
arm64: dts: ti: k3-j7200-common-proc-board: Enable PCIe
arm64: dts: ti: k3-j721e-main: Fix PCIe maximum outbound regions
.../mfd/ti,j721e-system-controller.yaml | 6 +
.../bindings/pci/ti,j721e-pci-ep.yaml | 10 +-
.../bindings/pci/ti,j721e-pci-host.yaml | 16 ++-
.../dts/ti/k3-j7200-common-proc-board.dts | 38 ++++++
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 119 ++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 +-
6 files changed, 188 insertions(+), 9 deletions(-)
--
2.17.1
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