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Date: Mon, 2 Nov 2020 09:21:58 -0400 From: Jason Gunthorpe <jgg@...dia.com> To: Dave Jiang <dave.jiang@...el.com> CC: Bjorn Helgaas <helgaas@...nel.org>, <vkoul@...nel.org>, <megha.dey@...el.com>, <maz@...nel.org>, <bhelgaas@...gle.com>, <tglx@...utronix.de>, <alex.williamson@...hat.com>, <jacob.jun.pan@...el.com>, <ashok.raj@...el.com>, <yi.l.liu@...el.com>, <baolu.lu@...el.com>, <kevin.tian@...el.com>, <sanjay.k.kumar@...el.com>, <tony.luck@...el.com>, <jing.lin@...el.com>, <dan.j.williams@...el.com>, <kwankhede@...dia.com>, <eric.auger@...hat.com>, <parav@...lanox.com>, <rafael@...nel.org>, <netanelg@...lanox.com>, <shahafs@...lanox.com>, <yan.y.zhao@...ux.intel.com>, <pbonzini@...hat.com>, <samuel.ortiz@...el.com>, <mona.hossain@...el.com>, <dmaengine@...r.kernel.org>, <linux-kernel@...r.kernel.org>, <linux-pci@...r.kernel.org>, <kvm@...r.kernel.org> Subject: Re: [PATCH v4 06/17] PCI: add SIOV and IMS capability detection On Fri, Oct 30, 2020 at 03:49:22PM -0700, Dave Jiang wrote: > > > On 10/30/2020 3:45 PM, Jason Gunthorpe wrote: > > On Fri, Oct 30, 2020 at 02:20:03PM -0700, Dave Jiang wrote: > > > So the intel-iommu driver checks for the SIOV cap. And the idxd driver > > > checks for SIOV and IMS cap. There will be other upcoming drivers that will > > > check for such cap too. It is Intel vendor specific right now, but SIOV is > > > public and other vendors may implement to the spec. Is there a good place to > > > put the common capability check for that? > > > > I'm still really unhappy with these SIOV caps. It was explained this > > is just a hack to make up for pci_ims_array_create_msi_irq_domain() > > succeeding in VM cases when it doesn't actually work. > > > > Someday this is likely to get fixed, so tying platform behavior to PCI > > caps is completely wrong. > > > > This needs to be solved in the platform code, > > pci_ims_array_create_msi_irq_domain() should not succeed in these > > cases. > > That sounds reasonable. Are you asking that the IMS cap check should gate > the success/failure of pci_ims_array_create_msi_irq_domain() rather than the > driver? There shouldn't be an IMS cap at all As I understand, the problem here is the only way to establish new VT-d IRQ routing is by trapping and emulating MSI/MSI-X related activities and triggering routing of the vectors into the guest. There is a missing hypercall to allow the guest to do this on its own, presumably it will someday be fixed so IMS can work in guests. Until the hypercall is added pci_ims_array_create_msi_irq_domain() should simply fail in guests. No PCI cap check required. Jason
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