linux-kernel - [PATCH 2/4] arm64: kpti: Add KRYO2XX gold/silver CPU cores to kpti safelist

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Message-Id: <20201104232218.198800-3-konrad.dybcio@somainline.org>
Date:   Thu,  5 Nov 2020 00:22:11 +0100
From:   Konrad Dybcio <konrad.dybcio@...ainline.org>
To:     phone-devel@...r.kernel.org
Cc:     ~postmarketos/upstreaming@...ts.sr.ht, martin.botka@...ainline.org,
        angelogioacchino.delregno@...ainline.org,
        marijn.suijten@...ainline.org,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>,
        Stephen Boyd <swboyd@...omium.org>,
        Rob Herring <robh@...nel.org>, Marc Zyngier <maz@...nel.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Steven Price <steven.price@....com>,
        Mark Brown <broonie@...nel.org>,
        Andrew Scull <ascull@...gle.com>,
        Anshuman Khandual <anshuman.khandual@....com>,
        Amit Daniel Kachhap <amit.kachhap@....com>,
        Ionela Voinescu <ionela.voinescu@....com>,
        Kristina Martsenko <kristina.martsenko@....com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Vincenzo Frascino <vincenzo.frascino@....com>
Subject: [PATCH 2/4] arm64: kpti: Add KRYO2XX gold/silver CPU cores to kpti safelist

QCOM KRYO2XX gold (big) silver (LITTLE) CPU cores are based on
Cortex-A73 and Cortex-A53 respectively and are meltdown safe,
hence add them to kpti_safe_list[].

Signed-off-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
---
 arch/arm64/kernel/cpufeature.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index dcc165b3fc04..6f36c4f62f69 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1337,6 +1337,8 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
 		MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),
 		MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
 		MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL),
+		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_GOLD),
+		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_SILVER),
 		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
 		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
 		{ /* sentinel */ }
-- 
2.29.2