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Message-ID: <CAJKOXPdP0=XW0c8briEoCoa3QG19esinycZhORR=M986fTCU0A@mail.gmail.com>
Date: Wed, 4 Nov 2020 09:06:50 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Alice Guo <alice.guo@....com>
Cc: shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
festevam@...il.com, linux-imx@....com,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
linux-arm-kernel@...ts.infradead.org, peng.fan@....com
Subject: Re: [PATCH v1 3/4] LF-2571-3 arm64: dts: imx8m: add nvmem-cell
related stuff
On Wed, 4 Nov 2020 at 04:12, Alice Guo <alice.guo@....com> wrote:
>
> Add nvmem-cell related stuff for the soc unique ID.
Subject and commit msg: please do not add "stuff" but describe what
are you adding and why (what is the purpose, feature, benefit).
"Stuff" is too generic.
>
> Signed-off-by: Alice Guo <alice.guo@....com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 6 ++++++
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 ++++++
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 6 ++++++
> 4 files changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index ec71a5e8a062..b45dfe133ec7 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -261,6 +261,8 @@
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x0 0x0 0x3e000000>;
> + nvmem-cells = <&imx8mm_uid>;
> + nvmem-cell-names = "soc_unique_id";
>
> aips1: bus@...00000 {
> compatible = "fsl,aips-bus", "simple-bus";
> @@ -475,6 +477,10 @@
> #address-cells = <1>;
> #size-cells = <1>;
>
> + imx8mm_uid: unique_id@410 {
> + reg = <4 8>;
Register addresses and sizes are by convention in hex.
Best regards,
Krzysztof
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