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Message-ID: <5e322dc6-de2b-8e24-2aad-b7f7a3fbe172@arm.com>
Date:   Wed, 4 Nov 2020 10:07:11 +0000
From:   Suzuki K Poulose <suzuki.poulose@....com>
To:     Mathieu Poirier <mathieu.poirier@...aro.org>
Cc:     linux-arm-kernel@...ts.infradead.org, mike.leach@...aro.org,
        coresight@...ts.linaro.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 07/26] coresight: Introduce device access abstraction

On 11/3/20 5:25 PM, Mathieu Poirier wrote:
> On Tue, Nov 03, 2020 at 10:14:17AM -0700, Mathieu Poirier wrote:
>> Hi Suzuki,
>>
>> On Wed, Oct 28, 2020 at 10:09:26PM +0000, Suzuki K Poulose wrote:
>>> We are about to introduce support for sysreg access to ETMv4.4+
>>> component. Since there are generic routines that access the
>>> registers (e.g, CS_LOCK/UNLOCK , claim/disclaim operations, timeout)
>>> and in order to preserve the logic of these operations at a
>>> single place we introduce an abstraction layer for the accesses
>>> to a given device.
>>>
>>> Cc: Mathieu Poirier <mathieu.poirier@...aro.org>
>>> Cc: Mike Leach <mike.leach@...aro.org>
>>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@....com>
>>> ---
>>>   drivers/hwtracing/coresight/coresight-catu.c  |   1 +
>>>   drivers/hwtracing/coresight/coresight-core.c  |  49 +++++
>>>   .../hwtracing/coresight/coresight-cti-core.c  |   1 +
>>>   drivers/hwtracing/coresight/coresight-etb10.c |   1 +
>>>   .../coresight/coresight-etm3x-core.c          |   1 +
>>>   .../coresight/coresight-etm4x-core.c          |   1 +
>>>   .../hwtracing/coresight/coresight-funnel.c    |   1 +
>>>   .../coresight/coresight-replicator.c          |   1 +
>>>   drivers/hwtracing/coresight/coresight-stm.c   |   1 +
>>>   .../hwtracing/coresight/coresight-tmc-core.c  |   1 +
>>>   drivers/hwtracing/coresight/coresight-tpiu.c  |   1 +
>>>   include/linux/coresight.h                     | 197 ++++++++++++++++++
>>>   12 files changed, 256 insertions(+)
>>>
>>> diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c
>>> index 99430f6cf5a5..5baf29510f1b 100644
>>> --- a/drivers/hwtracing/coresight/coresight-catu.c
>>> +++ b/drivers/hwtracing/coresight/coresight-catu.c
>>> @@ -551,6 +551,7 @@ static int catu_probe(struct amba_device *adev, const struct amba_id *id)
>>>   	dev->platform_data = pdata;
>>>   
>>>   	drvdata->base = base;
>>> +	catu_desc.access = CSDEV_ACCESS_IOMEM(base);
>>
>> Ok for those
>>
>>>   	catu_desc.pdata = pdata;
>>>   	catu_desc.dev = dev;
>>>   	catu_desc.groups = catu_groups;
>>> diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
>>> index cc9e8025c533..e96deaca8cab 100644
>>> --- a/drivers/hwtracing/coresight/coresight-core.c
>>> +++ b/drivers/hwtracing/coresight/coresight-core.c
>>> @@ -1452,6 +1452,54 @@ int coresight_timeout(void __iomem *addr, u32 offset, int position, int value)
>>>   }
>>>   EXPORT_SYMBOL_GPL(coresight_timeout);
>>>   
>>> +u32 coresight_relaxed_read32(struct coresight_device *csdev, u32 offset)
>>> +{
>>> +	return csdev_access_relaxed_read32(&csdev->access, offset);
>>
>> This really doesn't give us much other than another jump.  I would give function
>> csdev_access_relaxed_read32() a coresight_device argument instead of a csdev_access
>> and rename it to coresight_relaxed_read32().  The same for the other access functions.
>>
> 
> Ignore the above, TPIU just gave me the logic behind what you did.

Thanks Mathieu, will address your comments in the next version.

Suzuki

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