linux-kernel - Re: [PATCH 12/14] media: sunxi: Add support for the A83T MIPI CSI-2 controller

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Message-ID: <20201104103731.GC285779@aptenodytes>
Date:   Wed, 4 Nov 2020 11:37:31 +0100
From:   Paul Kocialkowski <paul.kocialkowski@...tlin.com>
To:     Maxime Ripard <maxime@...no.tech>
Cc:     linux-media@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        devel@...verdev.osuosl.org, linux-sunxi@...glegroups.com,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Rob Herring <robh+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
        Yong Deng <yong.deng@...ewell.com>,
        Kishon Vijay Abraham I <kishon@...com>,
        Vinod Koul <vkoul@...nel.org>,
        Helen Koike <helen.koike@...labora.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Hans Verkuil <hans.verkuil@...co.com>,
        Sakari Ailus <sakari.ailus@...ux.intel.com>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Hans Verkuil <hverkuil@...all.nl>, kevin.lhopital@...mail.com
Subject: Re: [PATCH 12/14] media: sunxi: Add support for the A83T MIPI CSI-2
 controller

Hi,

On Mon 26 Oct 20, 18:00, Maxime Ripard wrote:
> On Fri, Oct 23, 2020 at 07:45:44PM +0200, Paul Kocialkowski wrote:
> > The A83T supports MIPI CSI-2 with a composite controller, covering both the
> > protocol logic and the D-PHY implementation. This controller seems to be found
> > on the A83T only and probably was abandonned since.
> > 
> > This implementation splits the protocol and D-PHY registers and uses the PHY
> > framework internally. The D-PHY is not registered as a standalone PHY driver
> > since it cannot be used with any other controller.
> > 
> > There are a few notable points about the controller:
> > - The initialisation sequence involes writing specific magic init values that
> >   do not seem to make any particular sense given the concerned register fields.
> > - Interrupts appear to be hitting regardless of the interrupt mask registers,
> >   which can cause a serious flood when transmission errors occur.
> 
> Ah, so it's a separate driver too.
> 
> > This work is based on the first version of the driver submitted by
> > Kévin L'hôpital, which was adapted to mainline from the Allwinner BSP.
> > This version integrates MIPI CSI-2 support as a standalone V4L2 subdev
> > instead of merging it in the sun6i-csi driver.
> > 
> > It was tested on a Banana Pi M3 board with an OV8865 sensor in a 4-lane
> > configuration.
> 
> Co-developped-by and SoB from Kevin?

Not really. I wrote this driver from scratch and even significantly reworked
the register descriptions to the point that I don't think it makes sense to
consider that he's an author. For parts that can be considered a derivative
work, copyright attribution was given in the header.

Cheers,

Paul

> Looking at the driver, the same comments from the v3s apply there
> 
> Maxime

-- 
Paul Kocialkowski, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com

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