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Message-ID: <CAPDyKFru7TbT-rFMr+BsaqcahOo1K2Lk_DFtLOpSy-QuEVpmFg@mail.gmail.com>
Date: Wed, 4 Nov 2020 13:37:57 +0100
From: Ulf Hansson <ulf.hansson@...aro.org>
To: Rui Feng <rui_feng@...lsil.com.cn>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: Arnd Bergmann <arnd@...db.de>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>
Subject: Re: [PATCH 1/8] mmc: rtsx: Add test mode for RTS5261
On Tue, 3 Nov 2020 at 10:54, <rui_feng@...lsil.com.cn> wrote:
>
> From: Rui Feng <rui_feng@...lsil.com.cn>
>
> This patch add test mode for RTS5261.
> If test mode is set, reader will switch to SD Express mode
> mandatorily, and this mode is used by factory testing only.
>
> Signed-off-by: Rui Feng <rui_feng@...lsil.com.cn>
Greg,
It seems this series is best funneld via my mmc tree, due to
dependency to recent changes I have queued.
I am fine to pick this as well, but awaiting an ack from you before I go ahead.
Kind regards
Uffe
> ---
> drivers/misc/cardreader/rts5261.h | 5 -----
> drivers/mmc/host/rtsx_pci_sdmmc.c | 19 ++++++++++++++++---
> include/linux/rtsx_pci.h | 4 ++++
> 3 files changed, 20 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/misc/cardreader/rts5261.h b/drivers/misc/cardreader/rts5261.h
> index 8d80f0d5d5d6..80179353bc46 100644
> --- a/drivers/misc/cardreader/rts5261.h
> +++ b/drivers/misc/cardreader/rts5261.h
> @@ -60,11 +60,6 @@
> /* DMACTL 0xFE2C */
> #define RTS5261_DMA_PACK_SIZE_MASK 0xF0
>
> -/* FW config info register */
> -#define RTS5261_FW_CFG_INFO0 0xFF50
> -#define RTS5261_FW_EXPRESS_TEST_MASK (0x01<<0)
> -#define RTS5261_FW_EA_MODE_MASK (0x01<<5)
> -
> /* FW status register */
> #define RTS5261_FW_STATUS 0xFF56
> #define RTS5261_EXPRESS_LINK_FAIL_MASK (0x01<<7)
> diff --git a/drivers/mmc/host/rtsx_pci_sdmmc.c b/drivers/mmc/host/rtsx_pci_sdmmc.c
> index c453ad403aa8..26be11a096cb 100644
> --- a/drivers/mmc/host/rtsx_pci_sdmmc.c
> +++ b/drivers/mmc/host/rtsx_pci_sdmmc.c
> @@ -47,6 +47,8 @@ struct realtek_pci_sdmmc {
> bool using_cookie;
> };
>
> +static int sdmmc_init_sd_express(struct mmc_host *mmc, struct mmc_ios *ios);
> +
> static inline struct device *sdmmc_dev(struct realtek_pci_sdmmc *host)
> {
> return &(host->pdev->dev);
> @@ -898,6 +900,7 @@ static int sd_power_on(struct realtek_pci_sdmmc *host)
> struct mmc_host *mmc = host->mmc;
> int err;
> u32 val;
> + u8 test_mode;
>
> if (host->power_state == SDMMC_POWER_ON)
> return 0;
> @@ -925,6 +928,15 @@ static int sd_power_on(struct realtek_pci_sdmmc *host)
> return err;
>
> if (PCI_PID(pcr) == PID_5261) {
> + /*
> + * If test mode is set switch to SD Express mandatorily,
> + * this is only for factory testing.
> + */
> + rtsx_pci_read_register(pcr, RTS5261_FW_CFG_INFO0, &test_mode);
> + if (test_mode & RTS5261_FW_EXPRESS_TEST_MASK) {
> + sdmmc_init_sd_express(mmc, NULL);
> + return 0;
> + }
> if (pcr->extra_caps & EXTRA_CAPS_SD_EXPRESS)
> mmc->caps2 |= MMC_CAP2_SD_EXP | MMC_CAP2_SD_EXP_1_2V;
> /*
> @@ -1354,11 +1366,12 @@ static int sdmmc_init_sd_express(struct mmc_host *mmc, struct mmc_ios *ios)
> RTS5261_AUX_CLK_16M_EN, RTS5261_AUX_CLK_16M_EN);
> rtsx_pci_write_register(pcr, RTS5261_FW_CFG0,
> RTS5261_FW_ENTER_EXPRESS, RTS5261_FW_ENTER_EXPRESS);
> + rtsx_pci_write_register(pcr, RTS5261_FW_CFG1,
> + RTS5261_MCU_CLOCK_GATING, RTS5261_MCU_CLOCK_GATING);
> rtsx_pci_write_register(pcr, RTS5261_FW_CFG1,
> RTS5261_MCU_BUS_SEL_MASK | RTS5261_MCU_CLOCK_SEL_MASK
> - | RTS5261_MCU_CLOCK_GATING | RTS5261_DRIVER_ENABLE_FW,
> - RTS5261_MCU_CLOCK_SEL_16M | RTS5261_MCU_CLOCK_GATING
> - | RTS5261_DRIVER_ENABLE_FW);
> + | RTS5261_DRIVER_ENABLE_FW,
> + RTS5261_MCU_CLOCK_SEL_16M | RTS5261_DRIVER_ENABLE_FW);
> host->eject = true;
> return 0;
> }
> diff --git a/include/linux/rtsx_pci.h b/include/linux/rtsx_pci.h
> index b47959f48ccd..db249e8707f3 100644
> --- a/include/linux/rtsx_pci.h
> +++ b/include/linux/rtsx_pci.h
> @@ -658,6 +658,10 @@
> #define PM_WAKE_EN 0x01
> #define PM_CTRL4 0xFF47
>
> +/* FW config info register */
> +#define RTS5261_FW_CFG_INFO0 0xFF50
> +#define RTS5261_FW_EXPRESS_TEST_MASK (0x01 << 0)
> +#define RTS5261_FW_EA_MODE_MASK (0x01 << 5)
> #define RTS5261_FW_CFG0 0xFF54
> #define RTS5261_FW_ENTER_EXPRESS (0x01 << 0)
>
> --
> 2.17.1
>
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