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Message-ID: <CAFA6WYNP+dSMVcsXw+aTiyzOOT7QY+ksckW4=L9u1rOej2MNNw@mail.gmail.com>
Date:   Wed, 4 Nov 2020 18:18:51 +0530
From:   Sumit Garg <sumit.garg@...aro.org>
To:     Masayoshi Mizuma <msys.mizuma@...il.com>
Cc:     Marc Zyngier <maz@...nel.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Daniel Thompson <daniel.thompson@...aro.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        Russell King - ARM Linux admin <linux@...linux.org.uk>,
        tsbogend@...ha.franken.de, mpe@...erman.id.au,
        "David S. Miller" <davem@...emloft.net>, mingo@...hat.com,
        bp@...en8.de, x86@...nel.org, Mark Rutland <mark.rutland@....com>,
        julien.thierry.kdev@...il.com,
        Douglas Anderson <dianders@...omium.org>,
        Jason Wessel <jason.wessel@...driver.com>,
        ito-yuichi@...itsu.com, kgdb-bugreport@...ts.sourceforge.net,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v7 1/7] arm64: Add framework to turn IPI as NMI

On Mon, 2 Nov 2020 at 21:03, Masayoshi Mizuma <msys.mizuma@...il.com> wrote:
>
> On Mon, Nov 02, 2020 at 05:14:41PM +0530, Sumit Garg wrote:
> > Introduce framework to turn an IPI as NMI using pseudo NMIs. The main
> > motivation for this feature is to have an IPI that can be leveraged to
> > invoke NMI functions on other CPUs.
> >
> > And current prospective users are NMI backtrace and KGDB CPUs round-up
> > whose support is added via future patches.
> >
> > Signed-off-by: Sumit Garg <sumit.garg@...aro.org>
> > ---
> >  arch/arm64/include/asm/nmi.h | 17 ++++++++++++
> >  arch/arm64/kernel/Makefile   |  2 +-
> >  arch/arm64/kernel/ipi_nmi.c  | 65 ++++++++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 83 insertions(+), 1 deletion(-)
> >  create mode 100644 arch/arm64/include/asm/nmi.h
> >  create mode 100644 arch/arm64/kernel/ipi_nmi.c
> >
> > diff --git a/arch/arm64/include/asm/nmi.h b/arch/arm64/include/asm/nmi.h
> > new file mode 100644
> > index 0000000..4cd14b6
> > --- /dev/null
> > +++ b/arch/arm64/include/asm/nmi.h
> > @@ -0,0 +1,17 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +#ifndef __ASM_NMI_H
> > +#define __ASM_NMI_H
> > +
> > +#ifndef __ASSEMBLER__
> > +
> > +#include <linux/cpumask.h>
> > +
> > +extern bool arm64_supports_nmi(void);
> > +extern void arm64_send_nmi(cpumask_t *mask);
> > +
> > +void set_smp_dynamic_ipi(int ipi);
> > +void dynamic_ipi_setup(int cpu);
> > +void dynamic_ipi_teardown(int cpu);
> > +
> > +#endif /* !__ASSEMBLER__ */
> > +#endif
> > diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
> > index bbaf0bc..525a1e0 100644
> > --- a/arch/arm64/kernel/Makefile
> > +++ b/arch/arm64/kernel/Makefile
> > @@ -17,7 +17,7 @@ obj-y                       := debug-monitors.o entry.o irq.o fpsimd.o              \
> >                          return_address.o cpuinfo.o cpu_errata.o              \
> >                          cpufeature.o alternative.o cacheinfo.o               \
> >                          smp.o smp_spin_table.o topology.o smccc-call.o       \
> > -                        syscall.o proton-pack.o
> > +                        syscall.o proton-pack.o ipi_nmi.o
> >
> >  targets                      += efi-entry.o
> >
> > diff --git a/arch/arm64/kernel/ipi_nmi.c b/arch/arm64/kernel/ipi_nmi.c
> > new file mode 100644
> > index 0000000..a945dcf
> > --- /dev/null
> > +++ b/arch/arm64/kernel/ipi_nmi.c
> > @@ -0,0 +1,65 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * NMI support for IPIs
> > + *
> > + * Copyright (C) 2020 Linaro Limited
> > + * Author: Sumit Garg <sumit.garg@...aro.org>
> > + */
> > +
> > +#include <linux/interrupt.h>
> > +#include <linux/irq.h>
> > +#include <linux/smp.h>
> > +
> > +#include <asm/nmi.h>
> > +
> > +static struct irq_desc *ipi_nmi_desc __read_mostly;
> > +static int ipi_nmi_id __read_mostly;
> > +
> > +bool arm64_supports_nmi(void)
> > +{
> > +     if (ipi_nmi_desc)
> > +             return true;
> > +
> > +     return false;
> > +}
> > +
> > +void arm64_send_nmi(cpumask_t *mask)
> > +{
> > +     if (WARN_ON_ONCE(!ipi_nmi_desc))
> > +             return;
> > +
> > +     __ipi_send_mask(ipi_nmi_desc, mask);
> > +}
> > +
> > +static irqreturn_t ipi_nmi_handler(int irq, void *data)
> > +{
> > +     /* nop, NMI handlers for special features can be added here. */
> > +
> > +     return IRQ_NONE;
> > +}
> > +
>
> > +void dynamic_ipi_setup(int cpu)
>
> cpu isn't used here, so void is better?
>
> void dynamic_ipi_setup(void)
>

Ack.

> > +{
> > +     if (!ipi_nmi_desc)
> > +             return;
> > +
> > +     if (!prepare_percpu_nmi(ipi_nmi_id))
> > +             enable_percpu_nmi(ipi_nmi_id, IRQ_TYPE_NONE);
> > +}
> > +
>
> > +void dynamic_ipi_teardown(int cpu)
>
> Same as here:
> void dynamic_ipi_teardown(void)
>

Ack.

> > +{
> > +     if (!ipi_nmi_desc)
> > +             return;
> > +
> > +     disable_percpu_nmi(ipi_nmi_id);
> > +     teardown_percpu_nmi(ipi_nmi_id);
> > +}
> > +
> > +void __init set_smp_dynamic_ipi(int ipi)
> > +{
> > +     if (!request_percpu_nmi(ipi, ipi_nmi_handler, "IPI", &cpu_number)) {
> > +             ipi_nmi_desc = irq_to_desc(ipi);
> > +             ipi_nmi_id = ipi;
> > +     }
> > +}
> > --
>
> Otherwise, looks good to me. Please feel free to add:
>
>         Reviewed-by: Masayoshi Mizuma <m.mizuma@...fujitsu.com>
>

Thanks.

-Sumit

> Thanks,
> Masa

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