lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20201105185652.GB1622537@bogus>
Date:   Thu, 5 Nov 2020 12:56:52 -0600
From:   Rob Herring <robh@...nel.org>
To:     Sameer Pujar <spujar@...dia.com>
Cc:     devicetree@...r.kernel.org, thierry.reding@...il.com,
        jonathanh@...dia.com, vkoul@...nel.org, tglx@...utronix.de,
        jason@...edaemon.net, maz@...nel.org, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org, dmaengine@...r.kernel.org
Subject: Re: [PATCH 2/4] dt-bindings: dma: Convert ADMA doc to json-schema

On Thu, Nov 05, 2020 at 03:54:04PM +0530, Sameer Pujar wrote:
> Move ADMA documentation to YAML format.
> 
> Signed-off-by: Sameer Pujar <spujar@...dia.com>
> ---
>  .../bindings/dma/nvidia,tegra210-adma.txt          | 56 -------------
>  .../bindings/dma/nvidia,tegra210-adma.yaml         | 95 ++++++++++++++++++++++
>  2 files changed, 95 insertions(+), 56 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
>  create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
> 
> diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
> deleted file mode 100644
> index 245d306..0000000
> --- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
> +++ /dev/null
> @@ -1,56 +0,0 @@
> -* NVIDIA Tegra Audio DMA (ADMA) controller
> -
> -The Tegra Audio DMA controller that is used for transferring data
> -between system memory and the Audio Processing Engine (APE).
> -
> -Required properties:
> -- compatible: Should contain one of the following:
> -  - "nvidia,tegra210-adma": for Tegra210
> -  - "nvidia,tegra186-adma": for Tegra186 and Tegra194
> -- reg: Should contain DMA registers location and length. This should be
> -  a single entry that includes all of the per-channel registers in one
> -  contiguous bank.
> -- interrupts: Should contain all of the per-channel DMA interrupts in
> -  ascending order with respect to the DMA channel index.
> -- clocks: Must contain one entry for the ADMA module clock
> -  (TEGRA210_CLK_D_AUDIO).
> -- clock-names: Must contain the name "d_audio" for the corresponding
> -  'clocks' entry.
> -- #dma-cells : Must be 1. The first cell denotes the receive/transmit
> -  request number and should be between 1 and the maximum number of
> -  requests supported. This value corresponds to the RX/TX_REQUEST_SELECT
> -  fields in the ADMA_CHn_CTRL register.
> -
> -
> -Example:
> -
> -adma: dma@...e2000 {
> -	compatible = "nvidia,tegra210-adma";
> -	reg = <0x0 0x702e2000 0x0 0x2000>;
> -	interrupt-parent = <&tegra_agic>;
> -	interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> -		     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> -	clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
> -	clock-names = "d_audio";
> -	#dma-cells = <1>;
> -};
> diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
> new file mode 100644
> index 0000000..b4e657d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
> @@ -0,0 +1,95 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra Audio DMA (ADMA) controller
> +
> +description: |
> +  The Tegra Audio DMA controller is used for transferring data
> +  between system memory and the Audio Processing Engine (APE).
> +
> +maintainers:
> +  - Jon Hunter <jonathanh@...dia.com>
> +
> +allOf:
> +  - $ref: "dma-controller.yaml#"
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - enum:
> +          - nvidia,tegra210-adma
> +          - nvidia,tegra186-adma
> +      - items:
> +          - const: nvidia,tegra194-adma
> +          - const: nvidia,tegra186-adma
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    description: |
> +      Should contain all of the per-channel DMA interrupts in
> +      ascending order with respect to the DMA channel index.

You need to define how many (minItems/maxItems).

> +
> +  clocks:
> +    description: Must contain one entry for the ADMA module clock

How many?

> +
> +  clock-names:
> +    const: d_audio
> +
> +  "#dma-cells":
> +    description: |
> +      The first cell denotes the receive/transmit request number and
> +      should be between 1 and the maximum number of requests supported.
> +      This value corresponds to the RX/TX_REQUEST_SELECT fields in the
> +      ADMA_CHn_CTRL register.
> +

Drop the blank line.

> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include<dt-bindings/clock/tegra210-car.h>
> +
> +    dma-controller@...e2000 {
> +        compatible = "nvidia,tegra210-adma";
> +        reg = <0x702e2000 0x2000>;
> +        interrupt-parent = <&tegra_agic>;
> +        interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> +        clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
> +        clock-names = "d_audio";
> +        #dma-cells = <1>;
> +    };
> +
> +...
> -- 
> 2.7.4
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ