linux-kernel - Re: [PATCH v2 2/4] pinctrl: amd: use higher precision for 512 RtcClk

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Fri, 6 Nov 2020 07:32:31 +0800
From:   Coiby Xu <coiby.xu@...il.com>
To:     Andy Shevchenko <andy.shevchenko@...il.com>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Hans de Goede <hdegoede@...hat.com>,
        "open list:PIN CONTROL SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 2/4] pinctrl: amd: use higher precision for 512 RtcClk

On Thu, Nov 05, 2020 at 01:13:07PM +0200, Andy Shevchenko wrote:
>On Thu, Nov 5, 2020 at 1:07 AM Coiby Xu <coiby.xu@...il.com> wrote:
>>
>> RTC is 32.768kHz thus 512 RtcClk equals 15625 usec.
>
>I could add that the documentation likely has dropped precision and
>that's why the driver mistakenly took the slightly deviated value.
>
Thank you for the suggestion and other fixes in patch 4/4. Applied in v3.

>Anyway.
>Reviewed-by: Andy Shevchenko <andy.shevchenko@...il.com>
>
>> Suggested-by: Andy Shevchenko <andy.shevchenko@...il.com>
>> Suggested-by: Hans de Goede <hdegoede@...hat.com>
>> Link: https://lore.kernel.org/linux-gpio/2f4706a1-502f-75f0-9596-cc25b4933b6c@redhat.com/
>> Signed-off-by: Coiby Xu <coiby.xu@...il.com>
>> ---
>>  drivers/pinctrl/pinctrl-amd.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
>> index d6b2b4bd337c..4aea3e05e8c6 100644
>> --- a/drivers/pinctrl/pinctrl-amd.c
>> +++ b/drivers/pinctrl/pinctrl-amd.c
>> @@ -156,7 +156,7 @@ static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
>>                         pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
>>                         pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
>>                 } else if (debounce < 250000) {
>> -                       time = debounce / 15600;
>> +                       time = debounce / 15625;
>>                         pin_reg |= time & DB_TMR_OUT_MASK;
>>                         pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
>>                         pin_reg |= BIT(DB_TMR_LARGE_OFF);
>> --
>> 2.28.0
>>
>
>
>--
>With Best Regards,
>Andy Shevchenko

--
Best regards,
Coiby