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Message-ID: <VE1PR04MB6687EC27F8C230A8F334119E8FED0@VE1PR04MB6687.eurprd04.prod.outlook.com>
Date: Fri, 6 Nov 2020 02:00:10 +0000
From: Leo Li <leoyang.li@....com>
To: Michael Walle <michael@...le.cc>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
CC: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>
Subject: RE: [PATCH v2 5/5] arm64: dts: lx2160a: fix FlexSPI clock
> -----Original Message-----
> From: Michael Walle <michael@...le.cc>
> Sent: Thursday, November 5, 2020 1:35 PM
> To: linux-clk@...r.kernel.org; devicetree@...r.kernel.org; linux-
> kernel@...r.kernel.org; linux-arm-kernel@...ts.infradead.org
> Cc: Michael Turquette <mturquette@...libre.com>; Stephen Boyd
> <sboyd@...nel.org>; Rob Herring <robh+dt@...nel.org>; Shawn Guo
> <shawnguo@...nel.org>; Leo Li <leoyang.li@....com>; Michael Walle
> <michael@...le.cc>
> Subject: [PATCH v2 5/5] arm64: dts: lx2160a: fix FlexSPI clock
>
> Now that we have a proper driver for the FlexSPI interface use it. This will fix
> SCK frequency switching on Layerscape SoCs.
>
> This was only compile time tested.
>
> Signed-off-by: Michael Walle <michael@...le.cc>
> ---
> Changes since v1:
> - none
>
> arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index 83072da6f6c6..6e375e80bd35 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -659,9 +659,20 @@
> };
>
> dcfg: syscon@...0000 {
> - compatible = "fsl,lx2160a-dcfg", "syscon";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,lx2160a-dcfg", "syscon", "simple-
> mfd";
> reg = <0x0 0x1e00000 0x0 0x10000>;
> + ranges = <0x0 0x0 0x1e00000 0x10000>;
> little-endian;
> +
> + fspi_clk: clock-controller@900 {
> + compatible = "fsl,lx2160a-flexspi-clk";
> + reg = <0x900 0x4>;
> + #clock-cells = <0>;
> + clocks = <&clockgen 4 0>;
This is different from the current <&clockgen 4 3>, is it an intended change?
> + clock-output-names = "fspi_clk";
> + };
> };
>
> tmu: tmu@...0000 {
> @@ -776,7 +787,7 @@
> <0x0 0x20000000 0x0 0x10000000>;
> reg-names = "fspi_base", "fspi_mmap";
> interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> + clocks = <&clockgen 4 3>, <&fspi_clk>;
> clock-names = "fspi_en", "fspi";
> status = "disabled";
> };
> --
> 2.20.1
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