linux-kernel - Re: [PATCH v5 5/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml

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Message-ID: <280623e3-d182-60f3-5588-96d00e573694@linux.intel.com>
Date:   Fri, 6 Nov 2020 12:43:41 +0800
From:   "Ramuthevar, Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@...ux.intel.com>
To:     Linus Walleij <linus.walleij@...aro.org>
Cc:     Mark Brown <broonie@...nel.org>, Vignesh R <vigneshr@...com>,
        Tudor Ambarus <tudor.ambarus@...rochip.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        linux-spi <linux-spi@...r.kernel.org>,
        Rob Herring <robh+dt@...nel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Miquèl Raynal <miquel.raynal@...tlin.com>,
        Simon Goldschmidt <simon.k.r.goldschmidt@...il.com>,
        Dinh Nguyen <dinguyen@...nel.org>,
        Richard Weinberger <richard@....at>, cheol.yong.kim@...el.com,
        qi-ming.wu@...el.com
Subject: Re: [PATCH v5 5/6] dt-bindings: spi: Convert cadence-quadspi.txt to
 cadence-quadspi.yaml

Hi,

On 5/11/2020 3:14 pm, Linus Walleij wrote:
> On Thu, Oct 29, 2020 at 8:39 AM Ramuthevar,Vadivel MuruganX
> <vadivel.muruganx.ramuthevar@...ux.intel.com> wrote:
> 
>> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
>>
>> Convert the cadence-quadspi.txt documentation to cadence-quadspi.yaml
>> remove the cadence-quadspi.txt from Documentation/devicetree/bindings/spi/
>>
>> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
> 
>> +  cdns,is-decoded-cs:
>> +    type: boolean
>> +    description:
>> +      Flag to indicate whether decoder is used or not.
> 
> Please elaborate a bit on what kind of decoder this is.
> I am curious! :)
Sure, I will elaborate more about decoder for chip select.

QSPI controller has in-built chip select decoder instead of external 
decder circuit, it supports multiple chip selection by 2-to-4 decoder, 
the below combinations
CS0 - 1110
CS1 - 1101
CS2 - 1011
CS3 - 0111

when in direct access mode, each chip selection has it's own specified 
memory region as well.

Regards
Vadivel
> 
> Yours,
> Linus Walleij
>