linux-kernel - Re: [RFC PATCH 0/3] Add Microchip PolarFire Soc Support

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Message-ID: <mhng-3a4619db-fe42-4ae0-a521-4032f23591ee@palmerdabbelt-glaptop1>
Date:   Thu, 05 Nov 2020 23:14:36 -0800 (PST)
From:   Palmer Dabbelt <palmer@...belt.com>
To:     Atish Patra <Atish.Patra@....com>
CC:     linux-kernel@...r.kernel.org, Atish Patra <Atish.Patra@....com>,
        aou@...s.berkeley.edu, Alistair Francis <Alistair.Francis@....com>,
        Anup Patel <Anup.Patel@....com>, devicetree@...r.kernel.org,
        linux-riscv@...ts.infradead.org,
        Paul Walmsley <paul.walmsley@...ive.com>, robh+dt@...nel.org,
        padmarao.begari@...rochip.com, daire.mcnamara@...rochip.com,
        Cyril.Jean@...rochip.com
Subject:     Re: [RFC PATCH 0/3] Add Microchip PolarFire Soc Support 

On Wed, 28 Oct 2020 16:27:56 PDT (-0700), Atish Patra wrote:
> This series adds minimal support for Microchip Polar Fire Soc Icicle kit.
> It is rebased on v5.10-rc1 and depends on clock support.
> Only MMC and ethernet drivers are enabled via this series.
> The idea here is to add the foundational patches so that other drivers
> can be added to on top of this.
>
> This series has been tested on Qemu and Polar Fire Soc Icicle kit.
> The following qemu series is necessary to test it on Qemu.
>
> The series can also be found at the following github repo.
>
> I noticed the latest version of mmc driver[2] hangs on the board with
> the latest clock driver. That's why, I have tested with the old clock
> driver available in the above github repo.

OK, I guess that's why it's an RFC?

> [1] https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html
> [2] https://www.spinics.net/lists/devicetree/msg383626.html

Looks like this one hasn't been merged yet.  IDK if something is broken with my
mail client but I'm not seeing any github repos.  If this depends on
not-yet-merged drivers then it's certainly RFC material, but aside from the DT
stuff (which should be straight-forward) it seems fine to me.

Since you posted this an an RFC I'm going to assume you're going to re-spin it.

Thanks!

>
> Atish Patra (3):
> RISC-V: Add Microchip PolarFire SoC kconfig option
> RISC-V: Initial DTS for Microchip ICICLE board
> RISC-V: Enable Microchip PolarFire ICICLE SoC
>
> arch/riscv/Kconfig.socs                       |   7 +
> arch/riscv/boot/dts/Makefile                  |   1 +
> arch/riscv/boot/dts/microchip/Makefile        |   2 +
> .../microchip/microchip-icicle-kit-a000.dts   | 313 ++++++++++++++++++
> arch/riscv/configs/defconfig                  |   4 +
> 5 files changed, 327 insertions(+)
> create mode 100644 arch/riscv/boot/dts/microchip/Makefile
> create mode 100644 arch/riscv/boot/dts/microchip/microchip-icicle-kit-a000.dts