lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <160466050594.397.9879783882609753138.tip-bot2@tip-bot2>
Date:   Fri, 06 Nov 2020 11:01:45 -0000
From:   "tip-bot2 for Kaixu Xia" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     Tosk Robot <tencent_os_robot@...cent.com>,
        Kaixu Xia <kaixuxia@...cent.com>, Borislav Petkov <bp@...e.de>,
        x86 <x86@...nel.org>, LKML <linux-kernel@...r.kernel.org>
Subject: [tip: ras/core] x86/mce: Assign boolean values to a bool variable

The following commit has been merged into the ras/core branch of tip:

Commit-ID:     77080929d56d87a57093869a15d2785b8b2d8cd5
Gitweb:        https://git.kernel.org/tip/77080929d56d87a57093869a15d2785b8b2d8cd5
Author:        Kaixu Xia <kaixuxia@...cent.com>
AuthorDate:    Fri, 06 Nov 2020 17:19:23 +08:00
Committer:     Borislav Petkov <bp@...e.de>
CommitterDate: Fri, 06 Nov 2020 11:51:04 +01:00

x86/mce: Assign boolean values to a bool variable

Fix the following coccinelle warnings:

  ./arch/x86/kernel/cpu/mce/core.c:1765:3-20: WARNING: Assignment of 0/1 to bool variable
  ./arch/x86/kernel/cpu/mce/core.c:1584:2-9: WARNING: Assignment of 0/1 to bool variable

 [ bp: Massage commit message. ]

Reported-by: Tosk Robot <tencent_os_robot@...cent.com>
Signed-off-by: Kaixu Xia <kaixuxia@...cent.com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Link: https://lkml.kernel.org/r/1604654363-1463-1-git-send-email-kaixuxia@tencent.com
---
 arch/x86/kernel/cpu/mce/core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 51bf910..888248a 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1581,7 +1581,7 @@ static void __mcheck_cpu_mce_banks_init(void)
 		 * __mcheck_cpu_init_clear_banks() does the final bank setup.
 		 */
 		b->ctl = -1ULL;
-		b->init = 1;
+		b->init = true;
 	}
 }
 
@@ -1762,7 +1762,7 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
 		 */
 
 		if (c->x86 == 6 && c->x86_model < 0x1A && this_cpu_read(mce_num_banks) > 0)
-			mce_banks[0].init = 0;
+			mce_banks[0].init = false;
 
 		/*
 		 * All newer Intel systems support MCE broadcasting. Enable

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ