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Message-ID: <bb5b370b-5091-f3ca-9967-5a5d91287788@oracle.com>
Date: Mon, 9 Nov 2020 20:56:05 +0100
From: Alexandre Chartre <alexandre.chartre@...cle.com>
To: tglx@...utronix.de, mingo@...hat.com, bp@...en8.de, hpa@...or.com,
x86@...nel.org, dave.hansen@...ux.intel.com, luto@...nel.org,
peterz@...radead.org, linux-kernel@...r.kernel.org,
thomas.lendacky@....com, jroedel@...e.de
Cc: konrad.wilk@...cle.com, jan.setjeeilers@...cle.com,
junaids@...gle.com, oweisse@...gle.com, rppt@...ux.vnet.ibm.com,
graf@...zon.de, mgross@...ux.intel.com, kuzuno@...il.com
Subject: Re: [RFC][PATCH 13/24] x86/pti: Extend PTI user mappings
[Copying the reply to Andy in the thread with the right email addresses]
On 11/9/20 6:28 PM, Andy Lutomirski wrote:
> On Mon, Nov 9, 2020 at 3:22 AM Alexandre Chartre
> <alexandre.chartre@...cle.com> wrote:
>>
>> Extend PTI user mappings so that more kernel entry code can be executed
>> with the user page-table. To do so, we need to map syscall and interrupt
>> entry code,
>
> Probably fine.
>
>> per cpu offsets (__per_cpu_offset, which is used some in
>> entry code),
>
> This likely already leaks due to vulnerable CPUs leaking address space
> layout info.
I forgot to update the comment, I am not mapping __per_cpu_offset anymore.
However, if we do map __per_cpu_offset then we don't need to enforce the
ordering in paranoid_entry to switch CR3 before GS.
>
>> the stack canary,
>
> That's going to be a very tough sell.
>
I can get rid of this, but this will require to disable stack-protector for
any function that we can call while using the user page-table, like already
done in patch 21 (x86/entry: Disable stack-protector for IST entry C handlers).
alex.
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