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Message-ID: <8771f66911522ab87fe1b9b16e4e9921@codeaurora.org>
Date: Mon, 09 Nov 2020 15:06:35 +0530
From: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
To: Marc Zyngier <maz@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>
Cc: phone-devel@...r.kernel.org, ~postmarketos/upstreaming@...ts.sr.ht,
martin.botka@...ainline.org,
angelogioacchino.delregno@...ainline.org,
marijn.suijten@...ainline.org,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Stephen Boyd <swboyd@...omium.org>,
Rob Herring <robh@...nel.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
Steven Price <steven.price@....com>,
Mark Brown <broonie@...nel.org>,
Andrew Scull <ascull@...gle.com>,
Anshuman Khandual <anshuman.khandual@....com>,
Amit Daniel Kachhap <amit.kachhap@....com>,
Ionela Voinescu <ionela.voinescu@....com>,
Kristina Martsenko <kristina.martsenko@....com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/4] arm64: cpu_errata: Apply Erratum 845719 to KRYO2XX
Silver
Hi Marc,
On 2020-11-05 14:59, Marc Zyngier wrote:
> On 2020-11-04 23:22, Konrad Dybcio wrote:
>> QCOM KRYO2XX Silver cores are Cortex-A53 based and are
>> susceptible to the 845719 erratum. Add them to the lookup
>> list to apply the erratum.
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
>> ---
>> arch/arm64/kernel/cpu_errata.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/arm64/kernel/cpu_errata.c
>> b/arch/arm64/kernel/cpu_errata.c
>> index 61314fd70f13..cafaf0da05b7 100644
>> --- a/arch/arm64/kernel/cpu_errata.c
>> +++ b/arch/arm64/kernel/cpu_errata.c
>> @@ -299,6 +299,8 @@ static const struct midr_range
>> erratum_845719_list[] = {
>> MIDR_REV_RANGE(MIDR_CORTEX_A53, 0, 0, 4),
>> /* Brahma-B53 r0p[0] */
>> MIDR_REV(MIDR_BRAHMA_B53, 0, 0),
>> + /* Kryo2XX Silver rAp4 */
>> + MIDR_REV(MIDR_QCOM_KRYO_2XX_SILVER, 0xa, 0x4),
>
> Is this the only affected version? If this is actually an A53, how do
> the
> revisions map between Kryo and Cortex cores?
>
From what I see from the docs, this is the only version used
in MSM8998(silver cores are based on Cortex A53) and it maps
to r0p4. @Konrad, can you include (rap4 => r0p4) in comment.
Thanks,
Sai
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