linux-kernel - Re: [PATCH] bus: mhi: core: fix potential operator-precedence with BHI macros

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Message-ID: <20201109120014.GE24289@work>
Date:   Mon, 9 Nov 2020 17:30:14 +0530
From:   Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To:     Jeffrey Hugo <jhugo@...eaurora.org>
Cc:     hemantk@...eaurora.org, bbhatt@...eaurora.org,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] bus: mhi: core: fix potential operator-precedence with
 BHI macros

On Tue, Oct 20, 2020 at 02:29:45PM -0600, Jeffrey Hugo wrote:
> The BHI_MSMHWID and BHI_OEMPKHASH macros take a value 'n' which is
> a BHI register index. If 'n' is an expression rather than a simple
> value, there can be an operator precedence issue which can result
> in the incorrect calculation of the register offset. Adding
> parentheses around the macro parameter can prevent such issues.
> 
> Signed-off-by: Jeffrey Hugo <jhugo@...eaurora.org>

Applied to mhi-next!

Thanks,
Mani

> ---
>  drivers/bus/mhi/core/internal.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h
> index 7989269..78e4e84 100644
> --- a/drivers/bus/mhi/core/internal.h
> +++ b/drivers/bus/mhi/core/internal.h
> @@ -153,8 +153,8 @@ extern struct bus_type mhi_bus_type;
>  #define BHI_SERIALNU (0x40)
>  #define BHI_SBLANTIROLLVER (0x44)
>  #define BHI_NUMSEG (0x48)
> -#define BHI_MSMHWID(n) (0x4C + (0x4 * n))
> -#define BHI_OEMPKHASH(n) (0x64 + (0x4 * n))
> +#define BHI_MSMHWID(n) (0x4C + (0x4 * (n)))
> +#define BHI_OEMPKHASH(n) (0x64 + (0x4 * (n)))
>  #define BHI_RSVD5 (0xC4)
>  #define BHI_STATUS_MASK (0xC0000000)
>  #define BHI_STATUS_SHIFT (30)
> -- 
> Qualcomm Technologies, Inc. is a member of the
> Code Aurora Forum, a Linux Foundation Collaborative Project.
>