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Message-ID: <2885e3ae-3a03-d6c1-4cb8-3c56256713ab@microchip.com>
Date:   Mon, 9 Nov 2020 13:28:11 +0000
From:   <Tudor.Ambarus@...rochip.com>
To:     <vigneshr@...com>, <p.yadav@...com>, <miquel.raynal@...tlin.com>,
        <richard@....at>, <linux-mtd@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
CC:     <nsekhar@...com>, <boris.brezillon@...labora.com>
Subject: Re: [PATCH v16 14/15] mtd: spi-nor: spansion: add support for Cypress
 Semper flash

On 11/7/20 9:58 AM, Vignesh Raghavendra wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Hi,
> 
> [...]
> 
> On 10/5/20 9:01 PM, Pratyush Yadav wrote:
>> +static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enable)
>> +{
>> +     struct spi_mem_op op;
>> +     u8 *buf = nor->bouncebuf;
>> +     int ret;
>> +
>> +     if (enable) {
>> +             /* Use 24 dummy cycles for memory array reads. */
>> +             ret = spi_nor_write_enable(nor);
>> +             if (ret)
>> +                     return ret;
>> +
>> +             *buf = SPINOR_REG_CYPRESS_CFR2V_MEMLAT_11_24;
>> +             op = (struct spi_mem_op)
>> +                     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
>> +                                SPI_MEM_OP_ADDR(3, SPINOR_REG_CYPRESS_CFR2V,
>> +                                                1),
>> +                                SPI_MEM_OP_NO_DUMMY,
>> +                                SPI_MEM_OP_DATA_OUT(1, buf, 1));
>> +
>> +             ret = spi_mem_exec_op(nor->spimem, &op);
>> +             if (ret)
>> +                     return ret;
>> +
>> +             ret = spi_nor_wait_till_ready(nor);
>> +             if (ret)
>> +                     return ret;
>> +
>> +             nor->read_dummy = 24;
>> +     }
>> +
>> +     /* Set/unset the octal and DTR enable bits. */
>> +     ret = spi_nor_write_enable(nor);
>> +     if (ret)
>> +             return ret;
>> +
>> +     if (enable)
>> +             *buf = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN;
>> +     else
>> +             *buf = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_DS;
>> +
>> +     op = (struct spi_mem_op)
>> +             SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
>> +                        SPI_MEM_OP_ADDR(enable ? 3 : 4,
>> +                                        SPINOR_REG_CYPRESS_CFR5V,
>> +                                        1),
>> +                        SPI_MEM_OP_NO_DUMMY,
>> +                        SPI_MEM_OP_DATA_OUT(1, buf, 1));
>> +
>> +     if (!enable)
>> +             spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
>> +
>> +     ret = spi_mem_exec_op(nor->spimem, &op);
>> +     if (ret)
>> +             return ret;
>> +
>> +     /* Give some time for the mode change to take place. */
>> +     usleep_range(1000, 1500);
>> +
> 
> This delay is no longer needed right? I can drop it while applying, if
> you confirm.
> 
> Tudor: Could you provide your R-by?

with usleep_range dropped one can add:

Reviewed-by: Tudor Ambarus <tudor.ambarus@...rochip.com>

Cheers,
ta

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