linux-kernel - Re: [PATCH] arm64: tegra186: Add missing CPU PMUs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20201110173601.GA2297135@ulmo>
Date:   Tue, 10 Nov 2020 18:36:01 +0100
From:   Thierry Reding <thierry.reding@...il.com>
To:     Marc Zyngier <maz@...nel.org>
Cc:     linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>,
        Jonathan Hunter <jonathanh@...dia.com>,
        Nagarjuna Kristam <nkristam@...dia.com>,
        Sowjanya Komatineni <skomatineni@...dia.com>,
        devicetree@...r.kernel.org
Subject: Re: [PATCH] arm64: tegra186: Add missing CPU PMUs

On Tue, Oct 13, 2020 at 10:58:51AM +0100, Marc Zyngier wrote:
> Add the description of CPU PMUs for both the Denver and A57 clusters,
> which enables the perf subsystem.
> 
> Signed-off-by: Marc Zyngier <maz@...nel.org>
> ---
>  arch/arm64/boot/dts/nvidia/tegra186.dtsi | 28 +++++++++++++++++++-----
>  1 file changed, 22 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> index fd44545e124d..6bb03668a8d3 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> @@ -1321,7 +1321,7 @@ cpus {
>  		#address-cells = <1>;
>  		#size-cells = <0>;
>  
> -		cpu@0 {
> +		denver_0: cpu@0 {
>  			compatible = "nvidia,tegra186-denver";
>  			device_type = "cpu";
>  			i-cache-size = <0x20000>;
> @@ -1334,7 +1334,7 @@ cpu@0 {
>  			reg = <0x000>;
>  		};
>  
> -		cpu@1 {
> +		denver_1: cpu@1 {
>  			compatible = "nvidia,tegra186-denver";
>  			device_type = "cpu";
>  			i-cache-size = <0x20000>;
> @@ -1347,7 +1347,7 @@ cpu@1 {
>  			reg = <0x001>;
>  		};
>  
> -		cpu@2 {
> +		ca57_0: cpu@2 {
>  			compatible = "arm,cortex-a57";
>  			device_type = "cpu";
>  			i-cache-size = <0xC000>;
> @@ -1360,7 +1360,7 @@ cpu@2 {
>  			reg = <0x100>;
>  		};
>  
> -		cpu@3 {
> +		ca57_1: cpu@3 {
>  			compatible = "arm,cortex-a57";
>  			device_type = "cpu";
>  			i-cache-size = <0xC000>;
> @@ -1373,7 +1373,7 @@ cpu@3 {
>  			reg = <0x101>;
>  		};
>  
> -		cpu@4 {
> +		ca57_2: cpu@4 {
>  			compatible = "arm,cortex-a57";
>  			device_type = "cpu";
>  			i-cache-size = <0xC000>;
> @@ -1386,7 +1386,7 @@ cpu@4 {
>  			reg = <0x102>;
>  		};
>  
> -		cpu@5 {
> +		ca57_3: cpu@5 {
>  			compatible = "arm,cortex-a57";
>  			device_type = "cpu";
>  			i-cache-size = <0xC000>;
> @@ -1418,6 +1418,22 @@ L2_A57: l2-cache1 {
>  		};
>  	};
>  
> +	pmu_denver {
> +		compatible = "nvidia,denver-pmu", "arm,armv8-pmuv3";

checkpatch complains that this isn't documented. Did I miss the DT
bindings patch or do we not have one for this?

Thierry

Download attachment "signature.asc" of type "application/pgp-signature" (834 bytes)