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Message-ID: <9d35d5ea113b4d917c1560906445a811.squirrel@twosheds.infradead.org>
Date: Tue, 10 Nov 2020 14:41:33 -0000
From: "David Woodhouse" <dwmw2@...radead.org>
To: "Raj, Ashok" <ashok.raj@...el.com>
Cc: "David Woodhouse" <dwmw2@...radead.org>,
"Jason Gunthorpe" <jgg@...dia.com>,
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Subject: Re: [PATCH v4 06/17] PCI: add SIOV and IMS capability detection
> Hi David
>
> I did't follow the support for 32768 CPUs in guest without IR support.
>
> Can you tell me how that is done?
Using bits 11-5 of the MSI address bits (the other 7 bits of "Extended
Destination ID" that aren't the Remappable Format indicator).
And physical addressing mode, which is no loss for external interrupts
since they're all unicast dest_Fixed these days anyway.
--
dwmw2
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