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Message-ID: <a12e3d8f-e0be-ee64-c8e5-6ccdab861cd1@oracle.com>
Date:   Wed, 11 Nov 2020 09:55:27 +0100
From:   Alexandre Chartre <alexandre.chartre@...cle.com>
To:     Andy Lutomirski <luto@...nel.org>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>, X86 ML <x86@...nel.org>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Peter Zijlstra <peterz@...radead.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Tom Lendacky <thomas.lendacky@....com>,
        Joerg Roedel <jroedel@...e.de>,
        Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
        jan.setjeeilers@...cle.com, Junaid Shahid <junaids@...gle.com>,
        oweisse@...gle.com, Mike Rapoport <rppt@...ux.vnet.ibm.com>,
        Alexander Graf <graf@...zon.de>, mgross@...ux.intel.com,
        kuzuno@...il.com
Subject: Re: [RFC][PATCH 13/24] x86/pti: Extend PTI user mappings



On 11/11/20 12:39 AM, Andy Lutomirski wrote:
>>
>> On 11/9/20 6:28 PM, Andy Lutomirski wrote:
>>> On Mon, Nov 9, 2020 at 3:22 AM Alexandre Chartre
>>> <alexandre.chartre@...cle.com> wrote:
>>>>
>>>> Extend PTI user mappings so that more kernel entry code can be executed
>>>> with the user page-table. To do so, we need to map syscall and interrupt
>>>> entry code,
>>>
>>> Probably fine.
>>>
>>>> per cpu offsets (__per_cpu_offset, which is used some in
>>>> entry code),
>>>
>>> This likely already leaks due to vulnerable CPUs leaking address space
>>> layout info.
>>
>> I forgot to update the comment, I am not mapping __per_cpu_offset anymore.
>>
>> However, if we do map __per_cpu_offset then we don't need to enforce the
>> ordering in paranoid_entry to switch CR3 before GS.
> 
> I'm okay with mapping __per_cpu_offset.
> 

Good. That way I can move the GS update back to assembly code (paranoid_entry/exit
will be mostly reduce to updating GS), and probably I won't need to disable
stack-protector.


>>>
>>>> the stack canary,
>>>
>>> That's going to be a very tough sell.
>>>
>>
>> I can get rid of this, but this will require to disable stack-protector for
>> any function that we can call while using the user page-table, like already
>> done in patch 21 (x86/entry: Disable stack-protector for IST entry C handlers).
>>
> 
> You could probably get away with using a different stack protector
> canary before and after the CR3 switch as long as you are careful to
> have the canary restored when you return from whatever function is
> involved.
> 

I was thinking about doing that. I will give it a try.

Thanks,

alex.

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