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Date:   Wed, 11 Nov 2020 14:16:29 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Evan Green <evgreen@...omium.org>
Cc:     Andy Shevchenko <andy@...nel.org>,
        "stable@...r.kernel.org" <stable@...r.kernel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Mika Westerberg <mika.westerberg@...ux.intel.com>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] pinctrl: intel: Fix Jasperlake hostown offset

On Tue, Nov 10, 2020 at 04:03:57PM -0800, Evan Green wrote:
> On Tue, Nov 10, 2020 at 3:48 PM Andy Shevchenko
> <andy.shevchenko@...il.com> wrote:
> > On Wednesday, November 11, 2020, Evan Green <evgreen@...omium.org> wrote:
> >>
> >> GPIOs that attempt to use interrupts get thwarted with a message like:
> >> "pin 161 cannot be used as IRQ" (for instance with SD_CD). This is because
> >> the JSL_HOSTSW_OWN offset is incorrect, so every GPIO looks like it's
> >> owned by ACPI.
> >
> >
> > Funny, I have created a similar patch few hours ago. Are you sure this is enough? In mine I have also padcfglock updated. But I have to confirm that, that’s why I didn’t send it out.
> 
> Oh weird! I didn't check padcfglock since it didn't happen to be
> involved in the bug I was tracking down. I was trying to clean out
> some skeletons in my kernel closet [1] and debugged it down to this.
> 
> If you want to smash the two patches together I'm fine with that. Let
> me know, and CC me if you do post something.

Can you test that 0x90 is correct value for padcfglock offset?

> [1] https://chromium.googlesource.com/chromiumos/overlays/board-overlays/+/master/overlay-dedede/sys-kernel/chromeos-kernel-5_4/files/0001-CHROMIUM-pinctrl-intel-Allow-pin-as-IRQ-even-in-ACPI.patch

-- 
With Best Regards,
Andy Shevchenko


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