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Message-ID: <1605201148-4508-5-git-send-email-srinivas.neeli@xilinx.com>
Date: Thu, 12 Nov 2020 22:42:23 +0530
From: Srinivas Neeli <srinivas.neeli@...inx.com>
To: <linus.walleij@...aro.org>, <bgolaszewski@...libre.com>,
<michal.simek@...inx.com>, <shubhrajyoti.datta@...inx.com>,
<sgoud@...inx.com>, <hancock@...systems.ca>
CC: <linux-gpio@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <git@...inx.com>,
Srinivas Neeli <srinivas.neeli@...inx.com>
Subject: [LINUX PATCH V3 4/9] gpio: gpio-xilinx: Reduce spinlock array to single
Changed spinlock array to single. It is preparation for irq support which
is shared between two channels that's why spinlock should be only one.
Signed-off-by: Srinivas Neeli <srinivas.neeli@...inx.com>
---
Changes in V3:
-Created new patch for spinlock changes.
---
drivers/gpio/gpio-xilinx.c | 23 ++++++++++-------------
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
index 99d603bfb6f0..69bdf1910215 100644
--- a/drivers/gpio/gpio-xilinx.c
+++ b/drivers/gpio/gpio-xilinx.c
@@ -47,7 +47,7 @@ struct xgpio_instance {
unsigned int gpio_width[2];
u32 gpio_state[2];
u32 gpio_dir[2];
- spinlock_t gpio_lock[2];
+ spinlock_t gpio_lock; /* For serializing operations */
struct clk *clk;
};
@@ -113,7 +113,7 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
int index = xgpio_index(chip, gpio);
int offset = xgpio_offset(chip, gpio);
- spin_lock_irqsave(&chip->gpio_lock[index], flags);
+ spin_lock_irqsave(&chip->gpio_lock, flags);
/* Write to GPIO signal and set its direction to output */
if (val)
@@ -124,7 +124,7 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
- spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
+ spin_unlock_irqrestore(&chip->gpio_lock, flags);
}
/**
@@ -148,8 +148,7 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
DECLARE_BITMAP(new, 64);
DECLARE_BITMAP(changed, 64);
- spin_lock_irqsave(&chip->gpio_lock[0], flags);
- spin_lock(&chip->gpio_lock[1]);
+ spin_lock_irqsave(&chip->gpio_lock, flags);
bitmap_set_value(old, state[0], 0, width[0]);
bitmap_set_value(old, state[1], width[0], width[1]);
@@ -170,8 +169,7 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
XGPIO_CHANNEL_OFFSET, state[1]);
- spin_unlock(&chip->gpio_lock[1]);
- spin_unlock_irqrestore(&chip->gpio_lock[0], flags);
+ spin_unlock_irqrestore(&chip->gpio_lock, flags);
}
/**
@@ -190,14 +188,14 @@ static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
int index = xgpio_index(chip, gpio);
int offset = xgpio_offset(chip, gpio);
- spin_lock_irqsave(&chip->gpio_lock[index], flags);
+ spin_lock_irqsave(&chip->gpio_lock, flags);
/* Set the GPIO bit in shadow register and set direction as input */
chip->gpio_dir[index] |= BIT(offset);
xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET +
xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
- spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
+ spin_unlock_irqrestore(&chip->gpio_lock, flags);
return 0;
}
@@ -221,7 +219,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
int index = xgpio_index(chip, gpio);
int offset = xgpio_offset(chip, gpio);
- spin_lock_irqsave(&chip->gpio_lock[index], flags);
+ spin_lock_irqsave(&chip->gpio_lock, flags);
/* Write state of GPIO signal */
if (val)
@@ -236,7 +234,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET +
xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
- spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
+ spin_unlock_irqrestore(&chip->gpio_lock, flags);
return 0;
}
@@ -294,8 +292,7 @@ static int xgpio_probe(struct platform_device *pdev)
if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0]))
chip->gpio_width[0] = 32;
- spin_lock_init(&chip->gpio_lock[0]);
- spin_lock_init(&chip->gpio_lock[1]);
+ spin_lock_init(&chip->gpio_lock);
if (of_property_read_u32(np, "xlnx,is-dual", &is_dual))
is_dual = 0;
--
2.7.4
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