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Message-ID: <20201112184308.7xrrpji257ufivx4@mobilestation>
Date: Thu, 12 Nov 2020 21:43:08 +0300
From: Serge Semin <Sergey.Semin@...kalelectronics.ru>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
CC: Serge Semin <fancer.lancer@...il.com>,
Felipe Balbi <balbi@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Florian Fainelli <f.fainelli@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Andy Gross <agross@...nel.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 18/18] arm64: dts: qcom: Harmonize DWC USB3 DT nodes
name
Hello Bjorn
On Wed, Nov 11, 2020 at 10:08:44AM -0600, Bjorn Andersson wrote:
> On Wed 11 Nov 03:15 CST 2020, Serge Semin wrote:
>
> > In accordance with the DWC USB3 bindings the corresponding node
> > name is suppose to comply with the Generic USB HCD DT schema, which
> > requires the USB nodes to have the name acceptable by the regexp:
> > "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
> > named.
> >
> > Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> > Acked-by: Krzysztof Kozlowski <krzk@...nel.org>
>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@...aro.org>
>
> Given the risk of merge conflicts with this patch I would prefer to take
> it through the qcom dts tree. Please let me know when patch 17 has been
> merged (or if you prefer that I take it through the same path).
I don't really know through what path the patch was supposed to find
its way into the kernel. Since I haven't got a public repo then for me a
preferred solution would be to merge this patch and the other by means
of the qcom tree.
Thanks
-Sergey
>
> Regards,
> Bjorn
>
> > ---
> > arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 4 ++--
> > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
> > arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++--
> > arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +-
> > arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 2 +-
> > arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++--
> > arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
> > arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++--
> > arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +-
> > 9 files changed, 14 insertions(+), 14 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
> > index defcbd15edf9..34e97da98270 100644
> > --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
> > @@ -1064,7 +1064,7 @@ &usb2 {
> > status = "okay";
> > extcon = <&usb2_id>;
> >
> > - dwc3@...0000 {
> > + usb@...0000 {
> > extcon = <&usb2_id>;
> > dr_mode = "otg";
> > maximum-speed = "high-speed";
> > @@ -1075,7 +1075,7 @@ &usb3 {
> > status = "okay";
> > extcon = <&usb3_id>;
> >
> > - dwc3@...0000 {
> > + usb@...0000 {
> > extcon = <&usb3_id>;
> > dr_mode = "otg";
> > };
> > diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> > index 96a5ec89b5f0..1129062a4ca1 100644
> > --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> > @@ -427,7 +427,7 @@ usb_0: usb@...8800 {
> > resets = <&gcc GCC_USB0_BCR>;
> > status = "disabled";
> >
> > - dwc_0: dwc3@...0000 {
> > + dwc_0: usb@...0000 {
> > compatible = "snps,dwc3";
> > reg = <0x8a00000 0xcd00>;
> > interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
> > @@ -468,7 +468,7 @@ usb_1: usb@...8800 {
> > resets = <&gcc GCC_USB1_BCR>;
> > status = "disabled";
> >
> > - dwc_1: dwc3@...0000 {
> > + dwc_1: usb@...0000 {
> > compatible = "snps,dwc3";
> > reg = <0x8c00000 0xcd00>;
> > interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
> > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> > index 9951286db775..66b6d2f0a093 100644
> > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> > @@ -1767,7 +1767,7 @@ usb3: usb@...8800 {
> > power-domains = <&gcc USB30_GDSC>;
> > status = "disabled";
> >
> > - dwc3@...0000 {
> > + usb@...0000 {
> > compatible = "snps,dwc3";
> > reg = <0x06a00000 0xcc00>;
> > interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
> > @@ -1978,7 +1978,7 @@ usb2: usb@...8800 {
> > power-domains = <&gcc USB30_GDSC>;
> > status = "disabled";
> >
> > - dwc3@...0000 {
> > + usb@...0000 {
> > compatible = "snps,dwc3";
> > reg = <0x07600000 0xcc00>;
> > interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>;
> > diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> > index c45870600909..7cc7897e7b83 100644
> > --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> > @@ -1678,7 +1678,7 @@ usb3: usb@...8800 {
> >
> > resets = <&gcc GCC_USB_30_BCR>;
> >
> > - usb3_dwc3: dwc3@...0000 {
> > + usb3_dwc3: usb@...0000 {
> > compatible = "snps,dwc3";
> > reg = <0x0a800000 0xcd00>;
> > interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> > diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
> > index 6422cf9d5855..88d7b7a53743 100644
> > --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
> > @@ -337,7 +337,7 @@ &usb2_phy_sec {
> > &usb3 {
> > status = "okay";
> >
> > - dwc3@...0000 {
> > + usb@...0000 {
> > dr_mode = "host";
> > };
> > };
> > diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> > index b654b802e95c..f6ef17553064 100644
> > --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> > @@ -544,7 +544,7 @@ usb3: usb@...8800 {
> > assigned-clock-rates = <19200000>, <200000000>;
> > status = "disabled";
> >
> > - dwc3@...0000 {
> > + usb@...0000 {
> > compatible = "snps,dwc3";
> > reg = <0x07580000 0xcd00>;
> > interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> > @@ -573,7 +573,7 @@ usb2: usb@...8800 {
> > assigned-clock-rates = <19200000>, <133333333>;
> > status = "disabled";
> >
> > - dwc3@...0000 {
> > + usb@...0000 {
> > compatible = "snps,dwc3";
> > reg = <0x078c0000 0xcc00>;
> > interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> > index d46b3833e52f..bbc9a2b5c570 100644
> > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> > @@ -2673,7 +2673,7 @@ usb_1: usb@...8800 {
> > <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3>;
> > interconnect-names = "usb-ddr", "apps-usb";
> >
> > - usb_1_dwc3: dwc3@...0000 {
> > + usb_1_dwc3: usb@...0000 {
> > compatible = "snps,dwc3";
> > reg = <0 0x0a600000 0 0xe000>;
> > interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > index 2884577dcb77..ca20e4e91f61 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > @@ -3573,7 +3573,7 @@ usb_1: usb@...8800 {
> > <&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_0>;
> > interconnect-names = "usb-ddr", "apps-usb";
> >
> > - usb_1_dwc3: dwc3@...0000 {
> > + usb_1_dwc3: usb@...0000 {
> > compatible = "snps,dwc3";
> > reg = <0 0x0a600000 0 0xcd00>;
> > interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> > @@ -3621,7 +3621,7 @@ usb_2: usb@...8800 {
> > <&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_1>;
> > interconnect-names = "usb-ddr", "apps-usb";
> >
> > - usb_2_dwc3: dwc3@...0000 {
> > + usb_2_dwc3: usb@...0000 {
> > compatible = "snps,dwc3";
> > reg = <0 0x0a800000 0 0xcd00>;
> > interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > index b86a7ead3006..167d14dda974 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > @@ -846,7 +846,7 @@ usb_1: usb@...8800 {
> >
> > resets = <&gcc GCC_USB30_PRIM_BCR>;
> >
> > - usb_1_dwc3: dwc3@...0000 {
> > + usb_1_dwc3: usb@...0000 {
> > compatible = "snps,dwc3";
> > reg = <0 0x0a600000 0 0xcd00>;
> > interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> > --
> > 2.28.0
> >
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