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Message-ID: <a4760dc55d8122798c42b62d16bfde01a855769f.camel@collabora.com>
Date: Thu, 12 Nov 2020 05:36:41 -0300
From: Ezequiel Garcia <ezequiel@...labora.com>
To: "Mirela Rabulea (OSS)" <mirela.rabulea@....nxp.com>,
mchehab@...nel.org, hverkuil-cisco@...all.nl, shawnguo@...nel.org,
robh+dt@...nel.org, p.zabel@...gutronix.de
Cc: paul.kocialkowski@...tlin.com, linux-media@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-imx@....com,
s.hauer@...gutronix.de, aisheng.dong@....com,
daniel.baluta@....com, robert.chiras@....com,
laurentiu.palcu@....com, mark.rutland@....com,
devicetree@...r.kernel.org,
laurent.pinchart+renesas@...asonboard.com,
niklas.soderlund+renesas@...natech.se,
dafna.hirschfeld@...labora.com,
Mirela Rabulea <mirela.rabulea@....com>
Subject: Re: [PATCH v5 05/10] arm64: dts: imx8qxp: Add jpeg encoder/decoder
nodes
Hi Mirela,
On Thu, 2020-11-12 at 05:05 +0200, Mirela Rabulea (OSS) wrote:
> From: Mirela Rabulea <mirela.rabulea@....com>
>
> Add jpeg decoder/encoder nodes, for now on imx8qxp only.
> The same should work on imx8qm, but it was not tested.
>
Does imx8qm need changes in the dt bindings?
Unless you are aware of reasons preventing us from enabling
it on imx8qm, then we could go for imx8qm as well (reusing
imx8qxp- compatible).
> Signed-off-by: Mirela Rabulea <mirela.rabulea@....com>
> ---
> arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 8 ++++
> arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 37 +++++++++++++++++++
> 2 files changed, 45 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> index 46437d3c7a04..a0ad9789e9b8 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> @@ -270,3 +270,11 @@
> >;
> };
> };
> +
> +&jpegdec {
> + status = "okay";
> +};
> +
> +&jpegenc {
> + status = "okay";
> +};
Please drop this. See below.
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> index e46faac1fe71..1d9a16388fa8 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> @@ -629,4 +629,41 @@
> };
> };
> };
> +
> + img_subsys: bus@...00000 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x58000000 0x0 0x58000000 0x1000000>;
> +
> + jpegdec: jpegdec@...00000 {
> + compatible = "nxp,imx8qxp-jpgdec";
> + reg = <0x58400000 0x00050000 >;
> + interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
> + <&pd IMX_SC_R_MJPEG_DEC_S0>,
> + <&pd IMX_SC_R_MJPEG_DEC_S1>,
> + <&pd IMX_SC_R_MJPEG_DEC_S2>,
> + <&pd IMX_SC_R_MJPEG_DEC_S3>;
> + status = "disabled";
Pure memory-to-memory are typically not enabled per-board,
but just per-platform.
So you can drop the disabled status here.
Thanks,
Ezequiel
> + };
> +
> + jpegenc: jpegenc@...50000 {
> + compatible = "nxp,imx8qxp-jpgenc";
> + reg = <0x58450000 0x00050000 >;
> + interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
> + <&pd IMX_SC_R_MJPEG_ENC_S0>,
> + <&pd IMX_SC_R_MJPEG_ENC_S1>,
> + <&pd IMX_SC_R_MJPEG_ENC_S2>,
> + <&pd IMX_SC_R_MJPEG_ENC_S3>;
> + status = "disabled";
> + };
> + };
> };
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