[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <d409acab-f811-45f7-b00f-cd2f281d6112@arm.com>
Date: Thu, 12 Nov 2020 09:31:17 +0000
From: Suzuki K Poulose <suzuki.poulose@....com>
To: Anshuman Khandual <anshuman.khandual@....com>,
linux-arm-kernel@...ts.infradead.org, coresight@...ts.linaro.org
Cc: linux-kernel@...r.kernel.org, mathieu.poirier@...aro.org,
mike.leach@...aro.org
Subject: Re: [RFC 10/11] coresgith: etm-perf: Connect TRBE sink with ETE
source
Hi Anshuman,
On 11/10/20 12:45 PM, Anshuman Khandual wrote:
> Unlike traditional sink devices, individual TRBE instances are not detected
> via DT or ACPI nodes. Instead TRBE instances are detected during CPU online
> process. Hence a path connecting ETE and TRBE on a given CPU would not have
> been established until then. This adds two coresight helpers that will help
> modify outward connections from a source device to establish and terminate
> path to a given sink device. But this method might not be optimal and would
> be reworked later.
>
> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
Instead of this, could we come up something like a percpu_sink concept ? That
way, the TRBE driver could register the percpu_sink for the corresponding CPU
and we don't have to worry about the order in which the ETE will be probed
on a hotplugged CPU. (i.e, if the TRBE is probed before the ETE, the following
approach would fail to register the sink).
And the default sink can be initialized when the ETE instance first starts
looking for it.
Suzuki
Powered by blists - more mailing lists