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Message-ID: <20201113125432.GE3212@gaia>
Date:   Fri, 13 Nov 2020 12:54:33 +0000
From:   Catalin Marinas <catalin.marinas@....com>
To:     Ionela Voinescu <ionela.voinescu@....com>
Cc:     mark.rutland@....com, sudeep.holla@....com, will@...nel.org,
        morten.rasmussen@....com, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 3/3] arm64: implement CPPC FFH support using AMUs

On Fri, Nov 13, 2020 at 12:28:46PM +0000, Ionela Voinescu wrote:
> On Thursday 12 Nov 2020 at 18:00:46 (+0000), Catalin Marinas wrote:
> > On Fri, Nov 06, 2020 at 12:53:34PM +0000, Ionela Voinescu wrote:
> > > +static inline
> > > +int counters_read_on_cpu(int cpu, smp_call_func_t func, u64 *val)
> > > +{
> > > +	if (!cpu_has_amu_feat(cpu))
> > > +		return -EOPNOTSUPP;
> > > +
> > > +	smp_call_function_single(cpu, func, val, 1);
> > > +
> > > +	return 0;
> > > +}
> > 
> > I got lost in the cpufreq call chains. Can this function ever be called
> > with interrupts disabled?
> 
> The short answer is: not with the current implementation of its only
> user, the cppc_cpufreq driver (given the current cpufreq implementation).
> 
> The long answer is: there is a case where the cpufreq .get function is
> called with local interrupts disabled - cpufreq_quick_get(), but there
> are a few "if"s in between this becoming a problem:
> 
>  1. If cppc_cpufreq ever implements .setpolicy or,
>     1.1 Current implementation of cpufreq_quick_get() changes.
>  2. If one of the few users of cpufreq_quick_get() is used: cppc_cpufreq
>     ends up being used as CPU cooling device(+IPA governor) or
>     devfreq/tegra30 is used.
> 
>  In this potential case, smp_call_function_single() will warn us of call
>  with irqs_disable() and if the stars align there could be a potential
>  deadlock if two CPUs try to IPI (get counter reads of) each other.
> 
> So it could be called with irqs disabled, but a few code changes are
> needed before that happens.
> 
> I can bail out of counters_read_on_cpu() if irqs_disabled() to be on the
> safe side.

Thanks for the explanation. In case we forget two years from now and the
core code changes, I think it's safe to bail out early with an error.
You can add a patch on top of this series, no need to resend the whole.

-- 
Catalin

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