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Message-ID: <CO1PR11MB5026867ECF7693C7DC86571ADAE60@CO1PR11MB5026.namprd11.prod.outlook.com>
Date: Fri, 13 Nov 2020 02:12:29 +0000
From: "Sia, Jee Heng" <jee.heng.sia@...el.com>
To: Rob Herring <robh@...nel.org>
CC: "vkoul@...nel.org" <vkoul@...nel.org>,
"Eugeniy.Paltsev@...opsys.com" <Eugeniy.Paltsev@...opsys.com>,
"andriy.shevchenko@...ux.intel.com"
<andriy.shevchenko@...ux.intel.com>,
"dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: RE: [PATCH v3 10/15] dt-binding: dma: dw-axi-dmac: Add support for
Intel KeemBay AxiDMA
> -----Original Message-----
> From: Rob Herring <robh@...nel.org>
> Sent: 12 November 2020 10:58 PM
> To: Sia, Jee Heng <jee.heng.sia@...el.com>
> Cc: vkoul@...nel.org; Eugeniy.Paltsev@...opsys.com;
> andriy.shevchenko@...ux.intel.com; dmaengine@...r.kernel.org; linux-
> kernel@...r.kernel.org; devicetree@...r.kernel.org
> Subject: Re: [PATCH v3 10/15] dt-binding: dma: dw-axi-dmac: Add support for
> Intel KeemBay AxiDMA
>
> On Thu, Nov 12, 2020 at 04:49:48PM +0800, Sia Jee Heng wrote:
> > Add support for Intel KeemBay AxiDMA to the dw-axi-dmac Schemas DT
> > binding.
> >
> > Signed-off-by: Sia Jee Heng <jee.heng.sia@...el.com>
> > ---
> > .../bindings/dma/snps,dw-axi-dmac.yaml | 25 +++++++++++++++++++
> > 1 file changed, 25 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> > b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> > index 481ef0dacf5f..18e9422095bb 100644
> > --- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> > +++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> > @@ -8,6 +8,7 @@ title: Synopsys DesignWare AXI DMA Controller
> >
> > maintainers:
> > - Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com
> > + - Jee Heng Sia <jee.heng.sia@...el.com>
> >
> > description: |
> > Synopsys DesignWare AXI DMA Controller DT Binding @@ -16,6 +17,7 @@
> > properties:
> > compatible:
> > enum:
> > - snps,axi-dma-1.01a
> > + - intel,kmb-axi-dma
> >
> > reg:
> > items:
> > @@ -24,6 +26,7 @@ properties:
> > reg-names:
> > items:
> > - const: axidma_ctrl_regs
> > + - const: axidma_apb_regs
>
> You need 'minItems: 1' here or everyone has to have 2 entries.
>
> Also, doesn't 'reg' need updating?
>
> >
> > interrupts:
> > maxItems: 1
> > @@ -124,3 +127,25 @@ examples:
> > snps,priority = <0 1 2 3>;
> > snps,axi-max-burst-len = <16>;
> > };
> > +
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/interrupt-controller/irq.h>
> > + /* example with intel,kmb-axi-dma */
> > + #define KEEM_BAY_PSS_AXI_DMA
> > + #define KEEM_BAY_PSS_APB_AXI_DMA
> > + axi_dma: dma@...00000 {
> > + compatible = "intel,kmb-axi-dma";
> > + reg = <0x28000000 0x1000 0x20250000 0x24>;
>
> reg = <0x28000000 0x1000>, <0x20250000 0x24>;
[>>] Thanks Rob for the invaluable comments. Will update the changes in v4.
>
> > + reg-names = "axidma_ctrl_regs", "axidma_apb_regs";
> > + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> > + clock-names = "core-clk", "cfgr-clk";
> > + clocks = <&scmi_clk KEEM_BAY_PSS_AXI_DMA>, <&scmi_clk
> KEEM_BAY_PSS_APB_AXI_DMA>;
> > + #dma-cells = <1>;
> > + dma-channels = <8>;
> > + snps,dma-masters = <1>;
> > + snps,data-width = <4>;
> > + snps,priority = <0 0 0 0 0 0 0 0>;
> > + snps,block-size = <1024 1024 1024 1024 1024 1024 1024 1024>;
> > + snps,axi-max-burst-len = <16>;
> > + };
> > --
> > 2.18.0
> >
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