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Message-Id: <20201114135044.724385-1-daniel@0x0f.com>
Date: Sat, 14 Nov 2020 22:50:38 +0900
From: Daniel Palmer <daniel@...f.com>
To: linux-clk@...r.kernel.org, devicetree@...r.kernel.org
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
w@....eu, Daniel Palmer <daniel@...f.com>
Subject: [PATCH 0/6] ARM: mstar: Basic MPLL support
This series adds support for the MPLL block that is present in
MStar/SigmaStar ARMv7 SoCs.
This block is intended to be set and forgotten about before
Linux is running so all it actually does it read the registers
and calculate what the output frequencies should be.
We only care about this block because there are upstream dividers,
gates, muxes etc that need something between the input crystal
and themselves to calculate their own rates.
I think this needs to be applied after the GPIO series[0] that
is currently inflight.
0 - https://lore.kernel.org/linux-gpio/20201109121731.1537580-1-daniel@0x0f.com/
Daniel Palmer (6):
dt-bindings: clk: mstar msc313 mpll binding header
dt-bindings: clk: mstar msc313 mpll binding description
clk: mstar: MStar/SigmaStar MPLL driver
ARM: mstar: Select MSTAR_MSC313_MPLL
ARM: mstar: Add the external clocks to the base dsti
ARM: mstar: Add mpll to base dtsi
.../bindings/clock/mstar,msc313-mpll.yaml | 58 ++++++
MAINTAINERS | 3 +
arch/arm/boot/dts/mstar-v7.dtsi | 27 +++
arch/arm/mach-mstar/Kconfig | 1 +
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/mstar/Kconfig | 5 +
drivers/clk/mstar/Makefile | 6 +
drivers/clk/mstar/clk-msc313-mpll.c | 177 ++++++++++++++++++
include/dt-bindings/clock/mstar-msc313-mpll.h | 19 ++
10 files changed, 298 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml
create mode 100644 drivers/clk/mstar/Kconfig
create mode 100644 drivers/clk/mstar/Makefile
create mode 100644 drivers/clk/mstar/clk-msc313-mpll.c
create mode 100644 include/dt-bindings/clock/mstar-msc313-mpll.h
--
2.29.2
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