linux-kernel - [PATCH 6/6] ARM: mstar: Add mpll to base dtsi

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Message-Id: <20201114135044.724385-7-daniel@0x0f.com>
Date:   Sat, 14 Nov 2020 22:50:44 +0900
From:   Daniel Palmer <daniel@...f.com>
To:     linux-clk@...r.kernel.org, devicetree@...r.kernel.org
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        w@....eu, Daniel Palmer <daniel@...f.com>
Subject: [PATCH 6/6] ARM: mstar: Add mpll to base dtsi

All of the currently known MStar/SigmaStar ARMv7 SoCs have at least
one MPLL and it seems to always be at the same place so add it to
the base dtsi.

Signed-off-by: Daniel Palmer <daniel@...f.com>
---
 arch/arm/boot/dts/mstar-v7.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
index 6749d421dbf4..07fc46c7b4d4 100644
--- a/arch/arm/boot/dts/mstar-v7.dtsi
+++ b/arch/arm/boot/dts/mstar-v7.dtsi
@@ -6,6 +6,7 @@
 
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/mstar-msc313-mpll.h>
 
 / {
 	#address-cells = <1>;
@@ -124,6 +125,17 @@ l3bridge: l3bridge@...400 {
 				reg = <0x204400 0x200>;
 			};
 
+			mpll: mpll@...000 {
+				compatible = "mstar,msc313-mpll";
+				#clock-cells = <1>;
+				reg = <0x206000 0x200>;
+				clocks = <&xtal>;
+				clock-output-names = "mpll", "mpll_div_2",
+						     "mpll_div_3", "mpll_div_4",
+						     "mpll_div_5", "mpll_div_6",
+						     "mpll_div_7", "mpll_div_10";
+			};
+
 			gpio: gpio@...800 {
 				#gpio-cells = <2>;
 				reg = <0x207800 0x200>;
-- 
2.29.2